//////////////////////////////////////////////////////////////////////////////// // Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. //////////////////////////////////////////////////////////////////////////////// // ____ ____ // / /\/ / // /___/ \ / Vendor: Xilinx // \ \ \/ Version: P.20131013 // \ \ Application: netgen // / / Filename: v6_emac_v2_3_sgmii.v // /___/ /\ Timestamp: Wed Jan 8 10:15:06 2014 // \ \ / \ // \___\/\___\ // // Command : -intstyle ise -w -sim -ofmt verilog ./tmp/_cg/v6_emac_v2_3_sgmii.ngc ./tmp/_cg/v6_emac_v2_3_sgmii.v // Device : 6vlx130tff1156-1 // Input file : ./tmp/_cg/v6_emac_v2_3_sgmii.ngc // Output file : ./tmp/_cg/v6_emac_v2_3_sgmii.v // # of Modules : 1 // Design Name : v6_emac_v2_3_sgmii // Xilinx : /opt/Xilinx/14.7/ISE_DS/ISE/ // // Purpose: // This verilog netlist is a verification model and uses simulation // primitives which may not represent the true implementation of the // device, however the netlist is functionally correct and should not // be modified. This file cannot be synthesized and should only be used // with supported simulation tools. // // Reference: // Command Line Tools User Guide, Chapter 23 and Synthesis and Simulation Design Guide, Chapter 6 // //////////////////////////////////////////////////////////////////////////////// `timescale 1 ns/1 ps module v6_emac_v2_3_sgmii ( rx_axi_clk, sync_acq_status, glbl_rstn, signal_det, rx_axis_mac_tuser, loopback_msb, rx_buf_status, rx_not_in_table, mdio_out, tx_axi_rstn, mgt_tx_reset, powerdown, dcm_locked, tx_collision, mdio_tri, rx_run_disp, rx_axi_rstn, tx_char_disp_val, rx_disp_err, tx_axis_mac_tlast, tx_retransmit , en_comma_align, tx_axis_mac_tuser, tx_axi_clk_out, mdc_in, tx_buf_err, mdio_in, rx_char_is_k, rx_axis_mac_tvalid, rx_statistics_valid, tx_statistics_valid, tx_char_is_k, rx_axis_mac_tlast, speed_is_10_100, gtx_clk, rx_reset_out, tx_reset_out, tx_axi_clk, gmii_rx_dv, mgt_rx_reset, tx_axis_mac_tready, rx_char_is_comma, tx_axis_mac_tvalid, an_interrupt, tx_char_disp_mode, pause_req, tx_statistics_vector, pause_val, rx_clk_cor_cnt , rx_statistics_vector, gmii_rxd, phy_ad, tx_ifg_delay, tx_axis_mac_tdata, rx_axis_mac_tdata, gmii_txd )/* synthesis syn_black_box syn_noprune=1 */; input rx_axi_clk; output sync_acq_status; input glbl_rstn; input signal_det; output rx_axis_mac_tuser; output loopback_msb; input rx_buf_status; input rx_not_in_table; output mdio_out; input tx_axi_rstn; output mgt_tx_reset; output powerdown; input dcm_locked; output tx_collision; output mdio_tri; input rx_run_disp; input rx_axi_rstn; output tx_char_disp_val; input rx_disp_err; input tx_axis_mac_tlast; output tx_retransmit; output en_comma_align; input tx_axis_mac_tuser; output tx_axi_clk_out; input mdc_in; input tx_buf_err; input mdio_in; input rx_char_is_k; output rx_axis_mac_tvalid; output rx_statistics_valid; output tx_statistics_valid; output tx_char_is_k; output rx_axis_mac_tlast; output speed_is_10_100; input gtx_clk; output rx_reset_out; output tx_reset_out; input tx_axi_clk; input gmii_rx_dv; output mgt_rx_reset; output tx_axis_mac_tready; input rx_char_is_comma; input tx_axis_mac_tvalid; output an_interrupt; output tx_char_disp_mode; input pause_req; output [31 : 0] tx_statistics_vector; input [15 : 0] pause_val; input [2 : 0] rx_clk_cor_cnt; output [27 : 0] rx_statistics_vector; input [7 : 0] gmii_rxd; input [4 : 0] phy_ad; input [7 : 0] tx_ifg_delay; input [7 : 0] tx_axis_mac_tdata; output [7 : 0] rx_axis_mac_tdata; output [7 : 0] gmii_txd; // synthesis translate_off wire N0; wire NlwRenamedSig_OI_rx_reset_out; wire NlwRenamedSig_OI_tx_reset_out; wire NlwRenamedSig_OI_tx_axis_mac_tready; wire NlwRenamedSig_OI_tx_retransmit; wire \BU2/N27 ; wire \BU2/N26 ; wire \BU2/N24 ; wire \BU2/N22 ; wire \BU2/N20 ; wire \BU2/N18 ; wire \BU2/N17 ; wire \BU2/N15 ; wire \BU2/N14 ; wire \BU2/U0/rx_axi_shim/rx_frame_complete_rstpot_423 ; wire \BU2/U0/tx_axi_shim/force_end_rstpot_422 ; wire \BU2/U0/rx_axi_shim/rx_mac_tuser_rstpot_421 ; wire \BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_rstpot_420 ; wire \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_rstpot_419 ; wire \BU2/U0/tx_axi_shim/no_burst_rstpot_418 ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_rstpot_417 ; wire \BU2/U0/INT_RX_STATISTICS_VALID_rstpot_416 ; wire \BU2/U0/INT_TX_STATISTICS_VALID_rstpot_415 ; wire \BU2/U0/tx_axi_shim/two_byte_tx_rstpot_414 ; wire \BU2/U0/tx_axi_shim/tlast_reg_413 ; wire \BU2/U0/tx_axi_shim/ignore_packet_glue_set_412 ; wire \BU2/U0/tx_axi_shim/tx_data_valid_glue_set_411 ; wire \BU2/U0/tx_axi_shim/early_underrun_glue_set_410 ; wire \BU2/U0/tx_axi_shim/early_deassert_glue_set_409 ; wire \BU2/U0/tx_axi_shim/force_burst1_408 ; wire \BU2/U0/tx_axi_shim/force_burst1_glue_set_407 ; wire \BU2/U0/tx_axi_shim/force_assert_406 ; wire \BU2/U0/tx_axi_shim/force_assert_glue_set_405 ; wire \BU2/U0/tx_axi_shim/force_burst2_404 ; wire \BU2/U0/tx_axi_shim/force_burst2_glue_set_403 ; wire \BU2/U0/MATCH_FRAME_INT_402 ; wire \BU2/U0/MATCH_FRAME_INT_glue_set_401 ; wire \BU2/N12 ; wire \BU2/U0/tx_axi_shim/tx_underrun_glue_set ; wire \BU2/U0/tx_axi_shim/early_underrun_398 ; wire \BU2/N10 ; wire \BU2/N8 ; wire \BU2/N6 ; wire \BU2/U0/tx_axi_shim/early_deassert_394 ; wire \BU2/U0/tx_axi_shim/two_byte_tx_393 ; wire \BU2/N4 ; wire \BU2/U0/tx_axi_shim/force_end_391 ; wire \BU2/N2 ; wire \BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o5_389 ; wire \BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o2_388 ; wire \BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o1_387 ; wire \BU2/U0/rx_axi_shim/rx_frame_complete_386 ; wire \BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_385 ; wire \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ; wire \BU2/U0/tx_axi_shim/tlast_reg_glue_set ; wire \BU2/U0/tx_axi_shim/tx_state[3]_tx_state[3]_OR_34_o ; wire \BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT11 ; wire \BU2/U0/tx_axi_shim/tx_state[3]_tx_mac_tlast_AND_50_o ; wire \BU2/U0/tx_axi_shim/no_burst_379 ; wire \BU2/U0/tx_axi_shim/ignore_packet_378 ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_377 ; wire \BU2/U0/SYNC_TX_RESET_I/R3_PWR_19_o_MUX_100_o ; wire \BU2/U0/SYNC_TX_RESET_I/R3_375 ; wire \BU2/U0/SYNC_RX_RESET_I/R3_PWR_19_o_MUX_100_o ; wire \BU2/U0/SYNC_RX_RESET_I/R3_373 ; wire \BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_7_o ; wire \BU2/U0/rx_axi_shim/next_rx_state[1]_rx_enable_AND_9_o ; wire \BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_13_o ; wire \BU2/U0/rx_axi_shim/rx_state_FSM_FFd2_361 ; wire \BU2/U0/rx_axi_shim/rx_state_FSM_FFd2-In ; wire \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_REQ_reg_359 ; wire \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd2_342 ; wire \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_equal_13_o ; wire \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/TX_STATS_BYTEVLD_inv ; wire \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_LessThan_6_o ; wire \BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o ; wire \BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<0> ; wire \BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<1> ; wire \BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<2> ; wire \BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<3> ; wire \BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<4> ; wire \BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<5> ; wire \BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<6> ; wire \BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<7> ; wire \BU2/U0/tx_axi_shim/_n0269_inv ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd8_312 ; wire \BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_70_o ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ; wire \BU2/U0/tx_axi_shim/next_tx_state[3]_tx_enable_reg_AND_33_o ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd9_308 ; wire \BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_28_o ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd7_306 ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd7-In_305 ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd6_304 ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd6-In ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd3_302 ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd3-In_301 ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd5_300 ; wire \BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_71_o ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ; wire \BU2/U0/tx_axi_shim/next_tx_state[3]_PWR_18_o_equal_74_o ; wire \BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ; wire \BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_72_o ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<0> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<1> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<2> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<3> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<4> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<5> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<6> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<7> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<8> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<9> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<10> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<11> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<12> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<13> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<14> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<15> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<16> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<17> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<18> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<19> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<20> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<21> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<22> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<23> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<24> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<25> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<26> ; wire \BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<27> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<0> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<1> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<2> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<3> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<4> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<5> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<6> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<7> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<8> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<9> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<10> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<11> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<12> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<13> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<14> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<15> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<16> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<17> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<18> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<19> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<20> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<21> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<22> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<23> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<24> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<25> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<26> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<27> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<28> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<29> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<30> ; wire \BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<31> ; wire \BU2/U0/SYNC_TX_RESET_I/R2_234 ; wire \BU2/U0/SYNC_TX_RESET_I/R1_233 ; wire \BU2/U0/INT_TX_RST_ASYNCH ; wire \BU2/U0/SYNC_RX_RESET_I/R2_231 ; wire \BU2/U0/SYNC_RX_RESET_I/R1_230 ; wire \BU2/U0/INT_RX_RST_ASYNCH ; wire \BU2/U0/RX_BAD_FRAME ; wire \BU2/U0/INT_GLBL_RST ; wire \BU2/U0/TX_STATS_SHIFT ; wire \BU2/U0/RX_STATS_SHIFT_VLD ; wire \BU2/U0/TX_STATS_SHIFT_VLD ; wire \BU2/U0/tx_axi_shim/tx_data_valid_184 ; wire \BU2/U0/tx_axi_shim/tx_underrun_183 ; wire \BU2/U0/PAUSE_REQ_INT ; wire \BU2/U0/RX_GOOD_FRAME ; wire \BU2/U0/RX_DATA_VALID ; wire \BU2/U0/TX_ACK ; wire \BU2/U0/TX_STATS_BYTEVLD ; wire \BU2/mdc_out ; wire \BU2/gmii_tx_er ; wire \BU2/gmii_tx_en ; wire \BU2/N0 ; wire NLW_VCC_P_UNCONNECTED; wire \NLW_BU2/U0/v6_emac_HOSTMIIMRDY_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_DCRHOSTDONEIR_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACPHYTXGMIIMIICLKOUT_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXFRAMEDROP_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXDVLDMSW_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXCLIENTCLKOUT_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXSTATSBYTEVLD_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRACK_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACPHYTXCLK_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<15>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<14>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<13>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<12>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<11>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<10>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<9>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<8>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<0>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<1>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<2>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<3>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<4>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<5>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<6>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<7>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<8>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<9>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<10>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<11>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<12>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<13>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<14>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<15>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<16>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<17>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<18>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<19>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<20>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<21>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<22>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<23>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<24>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<25>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<26>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<27>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<28>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<29>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<30>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_EMACDCRDBUS<31>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<31>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<30>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<29>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<28>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<27>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<26>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<25>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<24>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<23>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<22>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<21>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<20>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<19>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<18>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<17>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<16>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<15>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<14>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<13>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<12>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<11>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<10>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<9>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<8>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<7>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<6>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<5>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<4>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<3>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<2>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<1>_UNCONNECTED ; wire \NLW_BU2/U0/v6_emac_HOSTRDDATA<0>_UNCONNECTED ; wire [7 : 0] gmii_txd_2; wire [7 : 0] rx_axis_mac_tdata_3; wire [27 : 6] NlwRenamedSig_OI_rx_statistics_vector; wire [5 : 0] rx_statistics_vector_4; wire [7 : 0] tx_axis_mac_tdata_5; wire [7 : 0] tx_ifg_delay_6; wire [31 : 0] NlwRenamedSig_OI_tx_statistics_vector; wire [15 : 0] pause_val_7; wire [7 : 0] gmii_rxd_8; wire [4 : 0] phy_ad_9; wire [2 : 0] rx_clk_cor_cnt_10; wire [7 : 0] \BU2/U0/rx_axi_shim/rx_data_reg ; wire [15 : 0] \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg ; wire [3 : 0] \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr ; wire [3 : 0] \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result ; wire [7 : 0] \BU2/U0/tx_axi_shim/tx_data_hold ; wire [6 : 0] \BU2/U0/RX_STATS_SHIFT ; wire [15 : 0] \BU2/U0/PAUSE_VAL_INT ; wire [7 : 0] \BU2/U0/RX_DATA ; wire [7 : 0] \BU2/U0/tx_axi_shim/tx_data ; assign tx_statistics_vector[31] = NlwRenamedSig_OI_tx_statistics_vector[31], tx_statistics_vector[30] = NlwRenamedSig_OI_tx_statistics_vector[30], tx_statistics_vector[29] = NlwRenamedSig_OI_tx_statistics_vector[29], tx_statistics_vector[28] = NlwRenamedSig_OI_tx_statistics_vector[28], tx_statistics_vector[27] = NlwRenamedSig_OI_tx_statistics_vector[27], tx_statistics_vector[26] = NlwRenamedSig_OI_tx_statistics_vector[26], tx_statistics_vector[25] = NlwRenamedSig_OI_tx_statistics_vector[25], tx_statistics_vector[24] = NlwRenamedSig_OI_tx_statistics_vector[24], tx_statistics_vector[23] = NlwRenamedSig_OI_tx_statistics_vector[23], tx_statistics_vector[22] = NlwRenamedSig_OI_tx_statistics_vector[22], tx_statistics_vector[21] = NlwRenamedSig_OI_tx_statistics_vector[21], tx_statistics_vector[20] = NlwRenamedSig_OI_tx_statistics_vector[20], tx_statistics_vector[19] = NlwRenamedSig_OI_tx_statistics_vector[19], tx_statistics_vector[18] = NlwRenamedSig_OI_tx_statistics_vector[18], tx_statistics_vector[17] = NlwRenamedSig_OI_tx_statistics_vector[17], tx_statistics_vector[16] = NlwRenamedSig_OI_tx_statistics_vector[16], tx_statistics_vector[15] = NlwRenamedSig_OI_tx_statistics_vector[15], tx_statistics_vector[14] = NlwRenamedSig_OI_tx_statistics_vector[14], tx_statistics_vector[13] = NlwRenamedSig_OI_tx_statistics_vector[13], tx_statistics_vector[12] = NlwRenamedSig_OI_tx_statistics_vector[12], tx_statistics_vector[11] = NlwRenamedSig_OI_tx_statistics_vector[11], tx_statistics_vector[10] = NlwRenamedSig_OI_tx_statistics_vector[10], tx_statistics_vector[9] = NlwRenamedSig_OI_tx_statistics_vector[9], tx_statistics_vector[8] = NlwRenamedSig_OI_tx_statistics_vector[8], tx_statistics_vector[7] = NlwRenamedSig_OI_tx_statistics_vector[7], tx_statistics_vector[6] = NlwRenamedSig_OI_tx_statistics_vector[6], tx_statistics_vector[5] = NlwRenamedSig_OI_tx_statistics_vector[5], tx_statistics_vector[4] = NlwRenamedSig_OI_tx_statistics_vector[4], tx_statistics_vector[3] = NlwRenamedSig_OI_tx_statistics_vector[3], tx_statistics_vector[2] = NlwRenamedSig_OI_tx_statistics_vector[2], tx_statistics_vector[1] = NlwRenamedSig_OI_tx_statistics_vector[1], tx_statistics_vector[0] = NlwRenamedSig_OI_tx_statistics_vector[0], pause_val_7[15] = pause_val[15], pause_val_7[14] = pause_val[14], pause_val_7[13] = pause_val[13], pause_val_7[12] = pause_val[12], pause_val_7[11] = pause_val[11], pause_val_7[10] = pause_val[10], pause_val_7[9] = pause_val[9], pause_val_7[8] = pause_val[8], pause_val_7[7] = pause_val[7], pause_val_7[6] = pause_val[6], pause_val_7[5] = pause_val[5], pause_val_7[4] = pause_val[4], pause_val_7[3] = pause_val[3], pause_val_7[2] = pause_val[2], pause_val_7[1] = pause_val[1], pause_val_7[0] = pause_val[0], rx_clk_cor_cnt_10[2] = rx_clk_cor_cnt[2], rx_clk_cor_cnt_10[1] = rx_clk_cor_cnt[1], rx_clk_cor_cnt_10[0] = rx_clk_cor_cnt[0], rx_statistics_vector[27] = NlwRenamedSig_OI_rx_statistics_vector[27], rx_statistics_vector[26] = NlwRenamedSig_OI_rx_statistics_vector[26], rx_statistics_vector[25] = NlwRenamedSig_OI_rx_statistics_vector[25], rx_statistics_vector[24] = NlwRenamedSig_OI_rx_statistics_vector[24], rx_statistics_vector[23] = NlwRenamedSig_OI_rx_statistics_vector[23], rx_statistics_vector[22] = NlwRenamedSig_OI_rx_statistics_vector[22], rx_statistics_vector[21] = NlwRenamedSig_OI_rx_statistics_vector[21], rx_statistics_vector[20] = NlwRenamedSig_OI_rx_statistics_vector[20], rx_statistics_vector[19] = NlwRenamedSig_OI_rx_statistics_vector[19], rx_statistics_vector[18] = NlwRenamedSig_OI_rx_statistics_vector[18], rx_statistics_vector[17] = NlwRenamedSig_OI_rx_statistics_vector[17], rx_statistics_vector[16] = NlwRenamedSig_OI_rx_statistics_vector[16], rx_statistics_vector[15] = NlwRenamedSig_OI_rx_statistics_vector[15], rx_statistics_vector[14] = NlwRenamedSig_OI_rx_statistics_vector[14], rx_statistics_vector[13] = NlwRenamedSig_OI_rx_statistics_vector[13], rx_statistics_vector[12] = NlwRenamedSig_OI_rx_statistics_vector[12], rx_statistics_vector[11] = NlwRenamedSig_OI_rx_statistics_vector[11], rx_statistics_vector[10] = NlwRenamedSig_OI_rx_statistics_vector[10], rx_statistics_vector[9] = NlwRenamedSig_OI_rx_statistics_vector[9], rx_statistics_vector[8] = NlwRenamedSig_OI_rx_statistics_vector[8], rx_statistics_vector[7] = NlwRenamedSig_OI_rx_statistics_vector[7], rx_statistics_vector[6] = NlwRenamedSig_OI_rx_statistics_vector[6], rx_statistics_vector[5] = rx_statistics_vector_4[5], rx_statistics_vector[4] = rx_statistics_vector_4[4], rx_statistics_vector[3] = rx_statistics_vector_4[3], rx_statistics_vector[2] = rx_statistics_vector_4[2], rx_statistics_vector[1] = rx_statistics_vector_4[1], rx_statistics_vector[0] = rx_statistics_vector_4[0], gmii_rxd_8[7] = gmii_rxd[7], gmii_rxd_8[6] = gmii_rxd[6], gmii_rxd_8[5] = gmii_rxd[5], gmii_rxd_8[4] = gmii_rxd[4], gmii_rxd_8[3] = gmii_rxd[3], gmii_rxd_8[2] = gmii_rxd[2], gmii_rxd_8[1] = gmii_rxd[1], gmii_rxd_8[0] = gmii_rxd[0], phy_ad_9[4] = phy_ad[4], phy_ad_9[3] = phy_ad[3], phy_ad_9[2] = phy_ad[2], phy_ad_9[1] = phy_ad[1], phy_ad_9[0] = phy_ad[0], tx_retransmit = NlwRenamedSig_OI_tx_retransmit, tx_ifg_delay_6[7] = tx_ifg_delay[7], tx_ifg_delay_6[6] = tx_ifg_delay[6], tx_ifg_delay_6[5] = tx_ifg_delay[5], tx_ifg_delay_6[4] = tx_ifg_delay[4], tx_ifg_delay_6[3] = tx_ifg_delay[3], tx_ifg_delay_6[2] = tx_ifg_delay[2], tx_ifg_delay_6[1] = tx_ifg_delay[1], tx_ifg_delay_6[0] = tx_ifg_delay[0], tx_axis_mac_tdata_5[7] = tx_axis_mac_tdata[7], tx_axis_mac_tdata_5[6] = tx_axis_mac_tdata[6], tx_axis_mac_tdata_5[5] = tx_axis_mac_tdata[5], tx_axis_mac_tdata_5[4] = tx_axis_mac_tdata[4], tx_axis_mac_tdata_5[3] = tx_axis_mac_tdata[3], tx_axis_mac_tdata_5[2] = tx_axis_mac_tdata[2], tx_axis_mac_tdata_5[1] = tx_axis_mac_tdata[1], tx_axis_mac_tdata_5[0] = tx_axis_mac_tdata[0], rx_axis_mac_tdata[7] = rx_axis_mac_tdata_3[7], rx_axis_mac_tdata[6] = rx_axis_mac_tdata_3[6], rx_axis_mac_tdata[5] = rx_axis_mac_tdata_3[5], rx_axis_mac_tdata[4] = rx_axis_mac_tdata_3[4], rx_axis_mac_tdata[3] = rx_axis_mac_tdata_3[3], rx_axis_mac_tdata[2] = rx_axis_mac_tdata_3[2], rx_axis_mac_tdata[1] = rx_axis_mac_tdata_3[1], rx_axis_mac_tdata[0] = rx_axis_mac_tdata_3[0], rx_reset_out = NlwRenamedSig_OI_rx_reset_out, tx_reset_out = NlwRenamedSig_OI_tx_reset_out, gmii_txd[7] = gmii_txd_2[7], gmii_txd[6] = gmii_txd_2[6], gmii_txd[5] = gmii_txd_2[5], gmii_txd[4] = gmii_txd_2[4], gmii_txd[3] = gmii_txd_2[3], gmii_txd[2] = gmii_txd_2[2], gmii_txd[1] = gmii_txd_2[1], gmii_txd[0] = gmii_txd_2[0], tx_axis_mac_tready = NlwRenamedSig_OI_tx_axis_mac_tready; VCC VCC_0 ( .P(NLW_VCC_P_UNCONNECTED) ); GND GND_1 ( .G(N0) ); INV \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/TX_STATS_BYTEVLD_inv1_INV_0 ( .I(\BU2/U0/TX_STATS_BYTEVLD ), .O(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/TX_STATS_BYTEVLD_inv ) ); INV \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mcount_tx_stats_bytevld_ctr_xor<0>11_INV_0 ( .I(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [0]), .O(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result [0]) ); INV \BU2/U0/INT_GLBL_RST1_INV_0 ( .I(glbl_rstn), .O(\BU2/U0/INT_GLBL_RST ) ); LUT6 #( .INIT ( 64'h08082A0808080808 )) \BU2/U0/tx_axi_shim/ignore_packet_glue_set ( .I0(tx_axis_mac_tvalid), .I1(\BU2/U0/tx_axi_shim/ignore_packet_378 ), .I2(tx_axis_mac_tlast), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ), .I4(NlwRenamedSig_OI_tx_axis_mac_tready), .I5(tx_axis_mac_tuser), .O(\BU2/U0/tx_axi_shim/ignore_packet_glue_set_412 ) ); LUT5 #( .INIT ( 32'hFFFFFF8A )) \BU2/U0/rx_axi_shim/rx_frame_complete_rstpot ( .I0(\BU2/U0/rx_axi_shim/rx_frame_complete_386 ), .I1(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd2_361 ), .I2(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_385 ), .I3(\BU2/U0/RX_BAD_FRAME ), .I4(\BU2/U0/RX_GOOD_FRAME ), .O(\BU2/U0/rx_axi_shim/rx_frame_complete_rstpot_423 ) ); FD #( .INIT ( 1'b1 )) \BU2/U0/SYNC_TX_RESET_I/R3 ( .C(tx_axi_clk), .D(\BU2/U0/SYNC_TX_RESET_I/R2_234 ), .Q(\BU2/U0/SYNC_TX_RESET_I/R3_375 ) ); FD #( .INIT ( 1'b1 )) \BU2/U0/SYNC_TX_RESET_I/R4 ( .C(tx_axi_clk), .D(\BU2/U0/SYNC_TX_RESET_I/R3_PWR_19_o_MUX_100_o ), .Q(NlwRenamedSig_OI_tx_reset_out) ); FD #( .INIT ( 1'b1 )) \BU2/U0/SYNC_RX_RESET_I/R3 ( .C(rx_axi_clk), .D(\BU2/U0/SYNC_RX_RESET_I/R2_231 ), .Q(\BU2/U0/SYNC_RX_RESET_I/R3_373 ) ); FD #( .INIT ( 1'b1 )) \BU2/U0/SYNC_RX_RESET_I/R4 ( .C(rx_axi_clk), .D(\BU2/U0/SYNC_RX_RESET_I/R3_PWR_19_o_MUX_100_o ), .Q(NlwRenamedSig_OI_rx_reset_out) ); LUT4 #( .INIT ( 16'hABA8 )) \BU2/U0/tx_axi_shim/two_byte_tx_rstpot ( .I0(tx_axis_mac_tlast), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_377 ), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd8_312 ), .I3(\BU2/U0/tx_axi_shim/two_byte_tx_393 ), .O(\BU2/U0/tx_axi_shim/two_byte_tx_rstpot_414 ) ); LUT5 #( .INIT ( 32'hFFEFFFEC )) \BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o7 ( .I0(\BU2/N27 ), .I1(\BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o2_388 ), .I2(\BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o5_389 ), .I3(\BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o1_387 ), .I4(\BU2/N26 ), .O(\BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o ) ); LUT4 #( .INIT ( 16'h444F )) \BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o7_SW1 ( .I0(tx_axis_mac_tlast), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd9_308 ), .I2(\BU2/U0/tx_axi_shim/early_deassert_394 ), .I3(\BU2/U0/tx_axi_shim/two_byte_tx_393 ), .O(\BU2/N27 ) ); LUT6 #( .INIT ( 64'h44454444444F4444 )) \BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o7_SW0 ( .I0(tx_axis_mac_tlast), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd9_308 ), .I2(\BU2/U0/tx_axi_shim/early_deassert_394 ), .I3(\BU2/U0/tx_axi_shim/two_byte_tx_393 ), .I4(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ), .I5(NlwRenamedSig_OI_tx_axis_mac_tready), .O(\BU2/N26 ) ); LUT6 #( .INIT ( 64'hFFFFFFFF00404040 )) \BU2/U0/tx_axi_shim/early_deassert_glue_set ( .I0(\BU2/U0/tx_axi_shim/two_byte_tx_393 ), .I1(\BU2/U0/tx_axi_shim/tx_data_valid_184 ), .I2(\BU2/U0/tx_axi_shim/early_deassert_394 ), .I3(tx_axis_mac_tvalid), .I4(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ), .I5(\BU2/U0/tx_axi_shim/tx_state[3]_tx_mac_tlast_AND_50_o ), .O(\BU2/U0/tx_axi_shim/early_deassert_glue_set_409 ) ); LUT6 #( .INIT ( 64'h0000FFDF00000000 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_rstpot ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [3]), .I1(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [2]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [0]), .I3(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [1]), .I4(NlwRenamedSig_OI_tx_reset_out), .I5(\BU2/N24 ), .O(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_rstpot_419 ) ); LUT3 #( .INIT ( 8'hEC )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_rstpot_SW0 ( .I0(pause_req), .I1(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd2_342 ), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .O(\BU2/N24 ) ); LUT6 #( .INIT ( 64'h1000555510001000 )) \BU2/U0/tx_axi_shim/early_underrun_glue_set ( .I0(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ), .I2(tx_axis_mac_tuser), .I3(NlwRenamedSig_OI_tx_axis_mac_tready), .I4(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_377 ), .I5(\BU2/N22 ), .O(\BU2/U0/tx_axi_shim/early_underrun_glue_set_410 ) ); LUT2 #( .INIT ( 4'h2 )) \BU2/U0/tx_axi_shim/early_underrun_glue_set_SW0 ( .I0(\BU2/U0/tx_axi_shim/early_underrun_398 ), .I1(\BU2/U0/TX_ACK ), .O(\BU2/N22 ) ); LUT6 #( .INIT ( 64'hFFFFFFFFAE0C0C0C )) \BU2/U0/tx_axi_shim/force_assert_glue_set ( .I0(\BU2/N12 ), .I1(\BU2/U0/tx_axi_shim/force_assert_406 ), .I2(\BU2/U0/tx_axi_shim/tx_data_valid_184 ), .I3(\BU2/U0/tx_axi_shim/early_deassert_394 ), .I4(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ), .I5(\BU2/N20 ), .O(\BU2/U0/tx_axi_shim/force_assert_glue_set_405 ) ); LUT3 #( .INIT ( 8'h2C )) \BU2/U0/tx_axi_shim/force_assert_glue_set_SW0 ( .I0(\BU2/U0/TX_ACK ), .I1(\BU2/U0/tx_axi_shim/force_burst2_404 ), .I2(\BU2/U0/tx_axi_shim/force_burst1_408 ), .O(\BU2/N20 ) ); LUT6 #( .INIT ( 64'hFFBFAABFFFAAAAAA )) \BU2/U0/tx_axi_shim/tx_data_valid_glue_set ( .I0(\BU2/U0/tx_axi_shim/force_assert_406 ), .I1(\BU2/U0/tx_axi_shim/two_byte_tx_393 ), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ), .I4(\BU2/N18 ), .I5(\BU2/N17 ), .O(\BU2/U0/tx_axi_shim/tx_data_valid_glue_set_411 ) ); LUT4 #( .INIT ( 16'h0002 )) \BU2/U0/tx_axi_shim/tx_data_valid_glue_set_SW1 ( .I0(tx_axis_mac_tvalid), .I1(tx_axis_mac_tuser), .I2(\BU2/U0/tx_axi_shim/no_burst_379 ), .I3(\BU2/U0/tx_axi_shim/ignore_packet_378 ), .O(\BU2/N18 ) ); LUT6 #( .INIT ( 64'h05000D0005000F00 )) \BU2/U0/tx_axi_shim/tx_data_valid_glue_set_SW0 ( .I0(\BU2/U0/TX_ACK ), .I1(tx_axis_mac_tvalid), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd3_302 ), .I3(\BU2/U0/tx_axi_shim/tx_data_valid_184 ), .I4(\BU2/U0/tx_axi_shim/early_deassert_394 ), .I5(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ), .O(\BU2/N17 ) ); LUT6 #( .INIT ( 64'h0008000800080000 )) \BU2/U0/rx_axi_shim/rx_mac_tuser_rstpot ( .I0(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd2_361 ), .I1(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_385 ), .I2(NlwRenamedSig_OI_rx_reset_out), .I3(\BU2/U0/MATCH_FRAME_INT_402 ), .I4(\BU2/U0/rx_axi_shim/rx_frame_complete_386 ), .I5(\BU2/U0/RX_DATA_VALID ), .O(\BU2/U0/rx_axi_shim/rx_mac_tuser_rstpot_421 ) ); LUT3 #( .INIT ( 8'h02 )) \BU2/U0/tx_axi_shim/no_burst_rstpot ( .I0(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd3_302 ), .I1(tx_axis_mac_tvalid), .I2(NlwRenamedSig_OI_tx_reset_out), .O(\BU2/U0/tx_axi_shim/no_burst_rstpot_418 ) ); LUT3 #( .INIT ( 8'h40 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_rstpot ( .I0(NlwRenamedSig_OI_tx_reset_out), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ), .I2(tx_axis_mac_tvalid), .O(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_rstpot_417 ) ); LUT3 #( .INIT ( 8'h40 )) \BU2/U0/INT_RX_STATISTICS_VALID_rstpot ( .I0(NlwRenamedSig_OI_rx_reset_out), .I1(NlwRenamedSig_OI_rx_statistics_vector[6]), .I2(\BU2/U0/RX_STATS_SHIFT_VLD ), .O(\BU2/U0/INT_RX_STATISTICS_VALID_rstpot_416 ) ); LUT3 #( .INIT ( 8'h40 )) \BU2/U0/INT_TX_STATISTICS_VALID_rstpot ( .I0(NlwRenamedSig_OI_tx_reset_out), .I1(NlwRenamedSig_OI_tx_statistics_vector[0]), .I2(\BU2/U0/TX_STATS_SHIFT_VLD ), .O(\BU2/U0/INT_TX_STATISTICS_VALID_rstpot_415 ) ); LUT3 #( .INIT ( 8'hBA )) \BU2/U0/MATCH_FRAME_INT_glue_set ( .I0(\BU2/U0/RX_GOOD_FRAME ), .I1(\BU2/U0/RX_BAD_FRAME ), .I2(\BU2/U0/MATCH_FRAME_INT_402 ), .O(\BU2/U0/MATCH_FRAME_INT_glue_set_401 ) ); LUT6 #( .INIT ( 64'hFFFF800080008000 )) \BU2/U0/tx_axi_shim/force_burst2_glue_set ( .I0(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd6_304 ), .I1(\BU2/U0/tx_axi_shim/two_byte_tx_393 ), .I2(\BU2/U0/tx_axi_shim/tlast_reg_413 ), .I3(tx_axis_mac_tvalid), .I4(\BU2/U0/tx_axi_shim/force_burst1_408 ), .I5(\BU2/U0/tx_axi_shim/force_burst2_404 ), .O(\BU2/U0/tx_axi_shim/force_burst2_glue_set_403 ) ); LUT5 #( .INIT ( 32'h20002222 )) \BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_rstpot ( .I0(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd2_361 ), .I1(NlwRenamedSig_OI_rx_reset_out), .I2(\BU2/U0/rx_axi_shim/rx_frame_complete_386 ), .I3(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_385 ), .I4(\BU2/U0/RX_DATA_VALID ), .O(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_rstpot_420 ) ); LUT6 #( .INIT ( 64'hFFFFFFFF888F8888 )) \BU2/U0/tx_axi_shim/force_end_rstpot ( .I0(\BU2/U0/TX_ACK ), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd5_300 ), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd7_306 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ), .I4(\BU2/U0/tx_axi_shim/force_end_391 ), .I5(NlwRenamedSig_OI_tx_retransmit), .O(\BU2/U0/tx_axi_shim/force_end_rstpot_422 ) ); LUT6 #( .INIT ( 64'hFFECFFA013005F00 )) \BU2/U0/tx_axi_shim/force_burst1_glue_set ( .I0(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd6_304 ), .I1(\BU2/U0/tx_axi_shim/early_deassert_394 ), .I2(\BU2/U0/tx_axi_shim/two_byte_tx_393 ), .I3(\BU2/N14 ), .I4(\BU2/U0/tx_axi_shim/tx_state[3]_tx_state[3]_OR_34_o ), .I5(\BU2/N15 ), .O(\BU2/U0/tx_axi_shim/force_burst1_glue_set_407 ) ); LUT4 #( .INIT ( 16'hB3A0 )) \BU2/U0/tx_axi_shim/early_deassert_two_byte_tx_OR_35_o1_SW1 ( .I0(tx_axis_mac_tvalid), .I1(\BU2/U0/TX_ACK ), .I2(\BU2/U0/tx_axi_shim/tlast_reg_413 ), .I3(\BU2/U0/tx_axi_shim/force_burst1_408 ), .O(\BU2/N15 ) ); LUT2 #( .INIT ( 4'h4 )) \BU2/U0/tx_axi_shim/early_deassert_two_byte_tx_OR_35_o1_SW0 ( .I0(\BU2/U0/TX_ACK ), .I1(\BU2/U0/tx_axi_shim/force_burst1_408 ), .O(\BU2/N14 ) ); FD \BU2/U0/rx_axi_shim/rx_frame_complete ( .C(rx_axi_clk), .D(\BU2/U0/rx_axi_shim/rx_frame_complete_rstpot_423 ), .Q(\BU2/U0/rx_axi_shim/rx_frame_complete_386 ) ); FD \BU2/U0/tx_axi_shim/force_end ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/force_end_rstpot_422 ), .Q(\BU2/U0/tx_axi_shim/force_end_391 ) ); FD \BU2/U0/rx_axi_shim/rx_mac_tuser ( .C(rx_axi_clk), .D(\BU2/U0/rx_axi_shim/rx_mac_tuser_rstpot_421 ), .Q(rx_axis_mac_tuser) ); FD \BU2/U0/rx_axi_shim/rx_state_FSM_FFd1 ( .C(rx_axi_clk), .D(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_rstpot_420 ), .Q(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_385 ) ); FD \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1 ( .C(tx_axi_clk), .D(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_rstpot_419 ), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ) ); FD \BU2/U0/tx_axi_shim/no_burst ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/no_burst_rstpot_418 ), .Q(\BU2/U0/tx_axi_shim/no_burst_379 ) ); FD \BU2/U0/tx_axi_shim/tx_state_FSM_FFd1 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_rstpot_417 ), .Q(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_377 ) ); FD \BU2/U0/INT_RX_STATISTICS_VALID ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VALID_rstpot_416 ), .Q(rx_statistics_valid) ); FD \BU2/U0/INT_TX_STATISTICS_VALID ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VALID_rstpot_415 ), .Q(tx_statistics_valid) ); FDR \BU2/U0/tx_axi_shim/two_byte_tx ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/two_byte_tx_rstpot_414 ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/two_byte_tx_393 ) ); FDR \BU2/U0/tx_axi_shim/tx_underrun ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/tx_underrun_glue_set ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_underrun_183 ) ); FDR \BU2/U0/tx_axi_shim/tlast_reg ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/tlast_reg_glue_set ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tlast_reg_413 ) ); FDR \BU2/U0/tx_axi_shim/ignore_packet ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/ignore_packet_glue_set_412 ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/ignore_packet_378 ) ); FDR \BU2/U0/tx_axi_shim/tx_data_valid ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/tx_data_valid_glue_set_411 ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data_valid_184 ) ); FDR \BU2/U0/tx_axi_shim/early_underrun ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/early_underrun_glue_set_410 ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/early_underrun_398 ) ); FDR \BU2/U0/tx_axi_shim/early_deassert ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/early_deassert_glue_set_409 ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/early_deassert_394 ) ); FDR \BU2/U0/tx_axi_shim/force_burst1 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/force_burst1_glue_set_407 ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/force_burst1_408 ) ); FDR \BU2/U0/tx_axi_shim/force_assert ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/force_assert_glue_set_405 ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/force_assert_406 ) ); FDR \BU2/U0/tx_axi_shim/force_burst2 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/force_burst2_glue_set_403 ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/force_burst2_404 ) ); FDR \BU2/U0/MATCH_FRAME_INT ( .C(rx_axi_clk), .D(\BU2/U0/MATCH_FRAME_INT_glue_set_401 ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(\BU2/U0/MATCH_FRAME_INT_402 ) ); LUT2 #( .INIT ( 4'h2 )) \BU2/U0/tx_axi_shim/early_deassert_force_burst2_OR_33_o_SW0 ( .I0(tx_axis_mac_tvalid), .I1(tx_axis_mac_tlast), .O(\BU2/N12 ) ); LUT6 #( .INIT ( 64'hFFFF00C800C800C8 )) \BU2/U0/tx_axi_shim/tx_mac_tready_int_tx_ack_wire_OR_29_o ( .I0(\BU2/U0/TX_ACK ), .I1(\BU2/U0/tx_axi_shim/early_underrun_398 ), .I2(\BU2/U0/tx_axi_shim/force_end_391 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_377 ), .I4(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ), .I5(\BU2/N10 ), .O(\BU2/U0/tx_axi_shim/tx_underrun_glue_set ) ); LUT3 #( .INIT ( 8'hD0 )) \BU2/U0/tx_axi_shim/tx_mac_tready_int_tx_ack_wire_OR_29_o_SW0 ( .I0(tx_axis_mac_tvalid), .I1(tx_axis_mac_tuser), .I2(NlwRenamedSig_OI_tx_axis_mac_tready), .O(\BU2/N10 ) ); LUT6 #( .INIT ( 64'hFFFFF2F0F3F3F2F0 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd10-In ( .I0(\BU2/U0/TX_ACK ), .I1(tx_axis_mac_tvalid), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd3_302 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ), .I4(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ), .I5(\BU2/N8 ), .O(\BU2/U0/tx_axi_shim/next_tx_state[3]_tx_enable_reg_AND_33_o ) ); LUT3 #( .INIT ( 8'hFE )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd10-In_SW0 ( .I0(tx_axis_mac_tuser), .I1(\BU2/U0/tx_axi_shim/no_burst_379 ), .I2(\BU2/U0/tx_axi_shim/ignore_packet_378 ), .O(\BU2/N8 ) ); LUT6 #( .INIT ( 64'hFFFFFFFFAAAAAA08 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd4-In ( .I0(\BU2/U0/TX_ACK ), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd7_306 ), .I2(tx_axis_mac_tvalid), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_377 ), .I4(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd6_304 ), .I5(\BU2/N6 ), .O(\BU2/U0/tx_axi_shim/next_tx_state[3]_PWR_18_o_equal_74_o ) ); LUT5 #( .INIT ( 32'h01000300 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd4-In_SW0 ( .I0(tx_axis_mac_tlast), .I1(\BU2/U0/tx_axi_shim/early_deassert_394 ), .I2(\BU2/U0/tx_axi_shim/two_byte_tx_393 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ), .I4(NlwRenamedSig_OI_tx_axis_mac_tready), .O(\BU2/N6 ) ); LUT6 #( .INIT ( 64'hFFFFFFFFAAAAA888 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd3-In ( .I0(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ), .I1(\BU2/U0/tx_axi_shim/two_byte_tx_393 ), .I2(NlwRenamedSig_OI_tx_axis_mac_tready), .I3(tx_axis_mac_tlast), .I4(\BU2/U0/tx_axi_shim/early_deassert_394 ), .I5(\BU2/N4 ), .O(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd3-In_301 ) ); LUT4 #( .INIT ( 16'h1000 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd3-In_SW0 ( .I0(tx_axis_mac_tvalid), .I1(\BU2/U0/TX_ACK ), .I2(\BU2/U0/tx_axi_shim/force_end_391 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd7_306 ), .O(\BU2/N4 ) ); LUT6 #( .INIT ( 64'hFFFFFFFFAAAAAAAE )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd7-In ( .I0(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd5_300 ), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd7_306 ), .I2(\BU2/U0/tx_axi_shim/force_end_391 ), .I3(\BU2/U0/TX_ACK ), .I4(tx_axis_mac_tvalid), .I5(\BU2/N2 ), .O(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd7-In_305 ) ); LUT4 #( .INIT ( 16'h8880 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd7-In_SW0 ( .I0(tx_axis_mac_tlast), .I1(tx_axis_mac_tuser), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd8_312 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd9_308 ), .O(\BU2/N2 ) ); LUT4 #( .INIT ( 16'hAAA8 )) \BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o5 ( .I0(\BU2/U0/TX_ACK ), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_377 ), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd6_304 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd7_306 ), .O(\BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o5_389 ) ); LUT6 #( .INIT ( 64'hFF0FFF0FFF08FF00 )) \BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o2 ( .I0(tx_axis_mac_tuser), .I1(tx_axis_mac_tlast), .I2(\BU2/U0/TX_ACK ), .I3(\BU2/U0/tx_axi_shim/ignore_packet_378 ), .I4(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd6_304 ), .I5(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ), .O(\BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o2_388 ) ); LUT6 #( .INIT ( 64'hCCCCCCCCCC04CC00 )) \BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o1 ( .I0(tx_axis_mac_tuser), .I1(tx_axis_mac_tvalid), .I2(\BU2/U0/tx_axi_shim/no_burst_379 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd7_306 ), .I4(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ), .I5(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ), .O(\BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o1_387 ) ); LUT2 #( .INIT ( 4'h2 )) \BU2/U0/rx_axi_shim/rx_state_rx_state[1]_rx_enable_AND_13_o1 ( .I0(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd2_361 ), .I1(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_385 ), .O(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_13_o ) ); LUT4 #( .INIT ( 16'h8880 )) \BU2/U0/rx_axi_shim/next_rx_state[1]_rx_enable_AND_9_o1 ( .I0(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_385 ), .I1(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd2_361 ), .I2(\BU2/U0/RX_DATA_VALID ), .I3(\BU2/U0/rx_axi_shim/rx_frame_complete_386 ), .O(\BU2/U0/rx_axi_shim/next_rx_state[1]_rx_enable_AND_9_o ) ); LUT4 #( .INIT ( 16'hAA80 )) \BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_7_o1 ( .I0(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd2_361 ), .I1(\BU2/U0/rx_axi_shim/rx_frame_complete_386 ), .I2(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_385 ), .I3(\BU2/U0/RX_DATA_VALID ), .O(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_7_o ) ); LUT4 #( .INIT ( 16'h3B2A )) \BU2/U0/rx_axi_shim/rx_state_FSM_FFd2-In1 ( .I0(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd2_361 ), .I1(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd1_385 ), .I2(\BU2/U0/rx_axi_shim/rx_frame_complete_386 ), .I3(\BU2/U0/RX_DATA_VALID ), .O(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd2-In ) ); LUT4 #( .INIT ( 16'h88D8 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_REQ_out1 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_REQ_reg_359 ), .I2(pause_req), .I3(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd2_342 ), .O(\BU2/U0/PAUSE_REQ_INT ) ); LUT2 #( .INIT ( 4'h6 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mcount_tx_stats_bytevld_ctr_xor<1>11 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [1]), .I1(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [0]), .O(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result [1]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out161 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[9]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [9]), .O(\BU2/U0/PAUSE_VAL_INT [9]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out151 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[8]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [8]), .O(\BU2/U0/PAUSE_VAL_INT [8]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out141 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[7]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [7]), .O(\BU2/U0/PAUSE_VAL_INT [7]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out131 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[6]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [6]), .O(\BU2/U0/PAUSE_VAL_INT [6]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out121 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[5]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [5]), .O(\BU2/U0/PAUSE_VAL_INT [5]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out111 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[4]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [4]), .O(\BU2/U0/PAUSE_VAL_INT [4]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out101 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[3]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [3]), .O(\BU2/U0/PAUSE_VAL_INT [3]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out91 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[2]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [2]), .O(\BU2/U0/PAUSE_VAL_INT [2]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out81 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[1]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [1]), .O(\BU2/U0/PAUSE_VAL_INT [1]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out71 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[15]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [15]), .O(\BU2/U0/PAUSE_VAL_INT [15]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out61 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[14]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [14]), .O(\BU2/U0/PAUSE_VAL_INT [14]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out51 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[13]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [13]), .O(\BU2/U0/PAUSE_VAL_INT [13]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out41 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[12]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [12]), .O(\BU2/U0/PAUSE_VAL_INT [12]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out31 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[11]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [11]), .O(\BU2/U0/PAUSE_VAL_INT [11]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out21 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[10]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [10]), .O(\BU2/U0/PAUSE_VAL_INT [10]) ); LUT3 #( .INIT ( 8'hE4 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Mmux_PAUSE_VAL_out17 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd1_384 ), .I1(pause_val_7[0]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [0]), .O(\BU2/U0/PAUSE_VAL_INT [0]) ); LUT3 #( .INIT ( 8'h57 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_LessThan_6_o1 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [3]), .I1(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [1]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [2]), .O(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_LessThan_6_o ) ); LUT4 #( .INIT ( 16'h0008 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_equal_13_o11 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [0]), .I1(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [3]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [1]), .I3(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [2]), .O(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_equal_13_o ) ); LUT4 #( .INIT ( 16'h6CCC )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result<3>1 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [2]), .I1(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [3]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [0]), .I3(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [1]), .O(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result [3]) ); LUT3 #( .INIT ( 8'h6A )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result<2>1 ( .I0(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [2]), .I1(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [0]), .I2(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [1]), .O(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result [2]) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/tx_axi_shim/tx_mac_tlast_tx_mac_tready_int_AND_27_o1 ( .I0(tx_axis_mac_tlast), .I1(NlwRenamedSig_OI_tx_axis_mac_tready), .O(\BU2/U0/tx_axi_shim/tlast_reg_glue_set ) ); LUT2 #( .INIT ( 4'hE )) \BU2/U0/tx_axi_shim/tx_state_tx_state[3]_tx_state[3]_OR_34_o1 ( .I0(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd8_312 ), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_377 ), .O(\BU2/U0/tx_axi_shim/tx_state[3]_tx_state[3]_OR_34_o ) ); LUT4 #( .INIT ( 16'h88D8 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd2-In1 ( .I0(tx_axis_mac_tvalid), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd7_306 ), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ), .I3(\BU2/U0/TX_ACK ), .O(\BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_72_o ) ); LUT4 #( .INIT ( 16'hFFFE )) \BU2/U0/tx_axi_shim/_n0269_inv1 ( .I0(\BU2/U0/TX_ACK ), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ), .O(\BU2/U0/tx_axi_shim/_n0269_inv ) ); LUT5 #( .INIT ( 32'hFFFFFFF8 )) \BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT111 ( .I0(\BU2/U0/TX_ACK ), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_377 ), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ), .I4(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ), .O(\BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT11 ) ); LUT3 #( .INIT ( 8'hAC )) \BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT12 ( .I0(tx_axis_mac_tdata_5[7]), .I1(\BU2/U0/tx_axi_shim/tx_data_hold [7]), .I2(\BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT11 ), .O(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<7> ) ); LUT3 #( .INIT ( 8'hAC )) \BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT21 ( .I0(tx_axis_mac_tdata_5[6]), .I1(\BU2/U0/tx_axi_shim/tx_data_hold [6]), .I2(\BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT11 ), .O(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<6> ) ); LUT3 #( .INIT ( 8'hAC )) \BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT31 ( .I0(tx_axis_mac_tdata_5[5]), .I1(\BU2/U0/tx_axi_shim/tx_data_hold [5]), .I2(\BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT11 ), .O(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<5> ) ); LUT3 #( .INIT ( 8'hAC )) \BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT41 ( .I0(tx_axis_mac_tdata_5[4]), .I1(\BU2/U0/tx_axi_shim/tx_data_hold [4]), .I2(\BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT11 ), .O(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<4> ) ); LUT3 #( .INIT ( 8'hAC )) \BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT51 ( .I0(tx_axis_mac_tdata_5[3]), .I1(\BU2/U0/tx_axi_shim/tx_data_hold [3]), .I2(\BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT11 ), .O(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<3> ) ); LUT3 #( .INIT ( 8'hAC )) \BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT61 ( .I0(tx_axis_mac_tdata_5[2]), .I1(\BU2/U0/tx_axi_shim/tx_data_hold [2]), .I2(\BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT11 ), .O(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<2> ) ); LUT3 #( .INIT ( 8'hAC )) \BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT71 ( .I0(tx_axis_mac_tdata_5[1]), .I1(\BU2/U0/tx_axi_shim/tx_data_hold [1]), .I2(\BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT11 ), .O(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<1> ) ); LUT3 #( .INIT ( 8'hAC )) \BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT81 ( .I0(tx_axis_mac_tdata_5[0]), .I1(\BU2/U0/tx_axi_shim/tx_data_hold [0]), .I2(\BU2/U0/tx_axi_shim/Mmux_tx_data[7]_tx_mac_tdata[7]_mux_64_OUT11 ), .O(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<0> ) ); LUT4 #( .INIT ( 16'h4000 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd5-In1 ( .I0(\BU2/U0/TX_ACK ), .I1(tx_axis_mac_tlast), .I2(tx_axis_mac_tuser), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd6_304 ), .O(\BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_71_o ) ); LUT5 #( .INIT ( 32'h00080000 )) \BU2/U0/tx_axi_shim/tx_state[3]_tx_mac_tlast_AND_50_o1 ( .I0(tx_axis_mac_tvalid), .I1(tx_axis_mac_tlast), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ), .I4(NlwRenamedSig_OI_tx_axis_mac_tready), .O(\BU2/U0/tx_axi_shim/tx_state[3]_tx_mac_tlast_AND_50_o ) ); LUT5 #( .INIT ( 32'h00000040 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd9-In1 ( .I0(\BU2/U0/tx_axi_shim/ignore_packet_378 ), .I1(tx_axis_mac_tvalid), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ), .I3(tx_axis_mac_tuser), .I4(\BU2/U0/tx_axi_shim/no_burst_379 ), .O(\BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_28_o ) ); LUT3 #( .INIT ( 8'h2A )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd8-In1 ( .I0(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd9_308 ), .I1(tx_axis_mac_tlast), .I2(tx_axis_mac_tuser), .O(\BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_70_o ) ); LUT6 #( .INIT ( 64'h4444F5F4F5F4F5F4 )) \BU2/U0/tx_axi_shim/tx_state_FSM_FFd6-In1 ( .I0(\BU2/U0/TX_ACK ), .I1(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd1_377 ), .I2(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd8_312 ), .I3(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd6_304 ), .I4(tx_axis_mac_tlast), .I5(tx_axis_mac_tuser), .O(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd6-In ) ); LUT2 #( .INIT ( 4'h7 )) \BU2/U0/INT_TX_RST_ASYNCH1 ( .I0(glbl_rstn), .I1(tx_axi_rstn), .O(\BU2/U0/INT_TX_RST_ASYNCH ) ); LUT2 #( .INIT ( 4'h7 )) \BU2/U0/INT_RX_RST_ASYNCH1 ( .I0(glbl_rstn), .I1(rx_axi_rstn), .O(\BU2/U0/INT_RX_RST_ASYNCH ) ); LUT2 #( .INIT ( 4'hE )) \BU2/U0/SYNC_TX_RESET_I/Mmux_R3_PWR_19_o_MUX_100_o11 ( .I0(\BU2/U0/SYNC_TX_RESET_I/R2_234 ), .I1(\BU2/U0/SYNC_TX_RESET_I/R3_375 ), .O(\BU2/U0/SYNC_TX_RESET_I/R3_PWR_19_o_MUX_100_o ) ); LUT2 #( .INIT ( 4'hE )) \BU2/U0/SYNC_RX_RESET_I/Mmux_R3_PWR_19_o_MUX_100_o11 ( .I0(\BU2/U0/SYNC_RX_RESET_I/R2_231 ), .I1(\BU2/U0/SYNC_RX_RESET_I/R3_373 ), .O(\BU2/U0/SYNC_RX_RESET_I/R3_PWR_19_o_MUX_100_o ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT321 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[10]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<9> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT311 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[9]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<8> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT301 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[8]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<7> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT291 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[7]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<6> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT281 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[6]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<5> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT271 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[5]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<4> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT261 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[4]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<3> ) ); LUT2 #( .INIT ( 4'hB )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT251 ( .I0(\BU2/U0/TX_STATS_SHIFT ), .I1(\BU2/U0/TX_STATS_SHIFT_VLD ), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<31> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT241 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[31]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<30> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT231 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[3]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<2> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT221 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[30]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<29> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT211 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[29]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<28> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT201 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[28]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<27> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT191 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[27]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<26> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT181 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[26]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<25> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT171 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[25]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<24> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT161 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[24]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<23> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT151 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[23]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<22> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT141 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[22]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<21> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT131 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[21]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<20> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT121 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[2]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<1> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT111 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[20]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<19> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT101 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[19]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<18> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT91 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[18]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<17> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT81 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[17]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<16> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT71 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[16]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<15> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT61 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[15]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<14> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT51 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[14]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<13> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT41 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[13]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<12> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT33 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[12]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<11> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT210 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[11]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<10> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT110 ( .I0(\BU2/U0/TX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_tx_statistics_vector[1]), .O(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<0> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT281 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[16]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<9> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT271 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[15]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<8> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT261 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[14]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<7> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT251 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[13]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<6> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT241 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[12]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<5> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT231 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[11]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<4> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT221 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[10]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<3> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT211 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[9]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<2> ) ); LUT2 #( .INIT ( 4'hB )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT201 ( .I0(\BU2/U0/RX_STATS_SHIFT [6]), .I1(\BU2/U0/RX_STATS_SHIFT_VLD ), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<27> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT191 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(\BU2/U0/RX_STATS_SHIFT [5]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<26> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT181 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(\BU2/U0/RX_STATS_SHIFT [4]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<25> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT171 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(\BU2/U0/RX_STATS_SHIFT [3]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<24> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT161 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(\BU2/U0/RX_STATS_SHIFT [2]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<23> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT151 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(\BU2/U0/RX_STATS_SHIFT [1]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<22> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT141 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(\BU2/U0/RX_STATS_SHIFT [0]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<21> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT131 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[27]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<20> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT121 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[8]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<1> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT111 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[26]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<19> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT101 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[25]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<18> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT91 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[24]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<17> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT81 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[23]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<16> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT71 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[22]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<15> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT61 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[21]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<14> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT51 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[20]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<13> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT41 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[19]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<12> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT31 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[18]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<11> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT29 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[17]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<10> ) ); LUT2 #( .INIT ( 4'h8 )) \BU2/U0/Mmux_INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT110 ( .I0(\BU2/U0/RX_STATS_SHIFT_VLD ), .I1(NlwRenamedSig_OI_rx_statistics_vector[7]), .O(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<0> ) ); FD \BU2/U0/rx_axi_shim/rx_data_reg_0 ( .C(rx_axi_clk), .D(\BU2/U0/RX_DATA [0]), .Q(\BU2/U0/rx_axi_shim/rx_data_reg [0]) ); FD \BU2/U0/rx_axi_shim/rx_data_reg_1 ( .C(rx_axi_clk), .D(\BU2/U0/RX_DATA [1]), .Q(\BU2/U0/rx_axi_shim/rx_data_reg [1]) ); FD \BU2/U0/rx_axi_shim/rx_data_reg_2 ( .C(rx_axi_clk), .D(\BU2/U0/RX_DATA [2]), .Q(\BU2/U0/rx_axi_shim/rx_data_reg [2]) ); FD \BU2/U0/rx_axi_shim/rx_data_reg_3 ( .C(rx_axi_clk), .D(\BU2/U0/RX_DATA [3]), .Q(\BU2/U0/rx_axi_shim/rx_data_reg [3]) ); FD \BU2/U0/rx_axi_shim/rx_data_reg_4 ( .C(rx_axi_clk), .D(\BU2/U0/RX_DATA [4]), .Q(\BU2/U0/rx_axi_shim/rx_data_reg [4]) ); FD \BU2/U0/rx_axi_shim/rx_data_reg_5 ( .C(rx_axi_clk), .D(\BU2/U0/RX_DATA [5]), .Q(\BU2/U0/rx_axi_shim/rx_data_reg [5]) ); FD \BU2/U0/rx_axi_shim/rx_data_reg_6 ( .C(rx_axi_clk), .D(\BU2/U0/RX_DATA [6]), .Q(\BU2/U0/rx_axi_shim/rx_data_reg [6]) ); FD \BU2/U0/rx_axi_shim/rx_data_reg_7 ( .C(rx_axi_clk), .D(\BU2/U0/RX_DATA [7]), .Q(\BU2/U0/rx_axi_shim/rx_data_reg [7]) ); FDR \BU2/U0/rx_axi_shim/rx_mac_tvalid ( .C(rx_axi_clk), .D(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_7_o ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_axis_mac_tvalid) ); FDR \BU2/U0/rx_axi_shim/rx_mac_tlast ( .C(rx_axi_clk), .D(\BU2/U0/rx_axi_shim/next_rx_state[1]_rx_enable_AND_9_o ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_axis_mac_tlast) ); FDRE \BU2/U0/rx_axi_shim/rx_mac_tdata_0 ( .C(rx_axi_clk), .CE(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_13_o ), .D(\BU2/U0/rx_axi_shim/rx_data_reg [0]), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_axis_mac_tdata_3[0]) ); FDRE \BU2/U0/rx_axi_shim/rx_mac_tdata_1 ( .C(rx_axi_clk), .CE(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_13_o ), .D(\BU2/U0/rx_axi_shim/rx_data_reg [1]), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_axis_mac_tdata_3[1]) ); FDRE \BU2/U0/rx_axi_shim/rx_mac_tdata_2 ( .C(rx_axi_clk), .CE(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_13_o ), .D(\BU2/U0/rx_axi_shim/rx_data_reg [2]), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_axis_mac_tdata_3[2]) ); FDRE \BU2/U0/rx_axi_shim/rx_mac_tdata_3 ( .C(rx_axi_clk), .CE(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_13_o ), .D(\BU2/U0/rx_axi_shim/rx_data_reg [3]), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_axis_mac_tdata_3[3]) ); FDRE \BU2/U0/rx_axi_shim/rx_mac_tdata_4 ( .C(rx_axi_clk), .CE(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_13_o ), .D(\BU2/U0/rx_axi_shim/rx_data_reg [4]), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_axis_mac_tdata_3[4]) ); FDRE \BU2/U0/rx_axi_shim/rx_mac_tdata_5 ( .C(rx_axi_clk), .CE(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_13_o ), .D(\BU2/U0/rx_axi_shim/rx_data_reg [5]), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_axis_mac_tdata_3[5]) ); FDRE \BU2/U0/rx_axi_shim/rx_mac_tdata_6 ( .C(rx_axi_clk), .CE(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_13_o ), .D(\BU2/U0/rx_axi_shim/rx_data_reg [6]), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_axis_mac_tdata_3[6]) ); FDRE \BU2/U0/rx_axi_shim/rx_mac_tdata_7 ( .C(rx_axi_clk), .CE(\BU2/U0/rx_axi_shim/rx_state[1]_rx_enable_AND_13_o ), .D(\BU2/U0/rx_axi_shim/rx_data_reg [7]), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_axis_mac_tdata_3[7]) ); FDR \BU2/U0/rx_axi_shim/rx_state_FSM_FFd2 ( .C(rx_axi_clk), .D(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd2-In ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(\BU2/U0/rx_axi_shim/rx_state_FSM_FFd2_361 ) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_REQ_reg ( .C(tx_axi_clk), .D(pause_req), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_REQ_reg_359 ) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_0 ( .C(tx_axi_clk), .D(pause_val_7[0]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [0]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_1 ( .C(tx_axi_clk), .D(pause_val_7[1]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [1]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_2 ( .C(tx_axi_clk), .D(pause_val_7[2]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [2]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_3 ( .C(tx_axi_clk), .D(pause_val_7[3]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [3]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_4 ( .C(tx_axi_clk), .D(pause_val_7[4]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [4]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_5 ( .C(tx_axi_clk), .D(pause_val_7[5]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [5]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_6 ( .C(tx_axi_clk), .D(pause_val_7[6]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [6]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_7 ( .C(tx_axi_clk), .D(pause_val_7[7]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [7]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_8 ( .C(tx_axi_clk), .D(pause_val_7[8]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [8]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_9 ( .C(tx_axi_clk), .D(pause_val_7[9]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [9]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_10 ( .C(tx_axi_clk), .D(pause_val_7[10]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [10]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_11 ( .C(tx_axi_clk), .D(pause_val_7[11]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [11]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_12 ( .C(tx_axi_clk), .D(pause_val_7[12]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [12]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_13 ( .C(tx_axi_clk), .D(pause_val_7[13]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [13]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_14 ( .C(tx_axi_clk), .D(pause_val_7[14]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [14]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg_15 ( .C(tx_axi_clk), .D(pause_val_7[15]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/PAUSE_VAL_reg [15]) ); FDR \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd2 ( .C(tx_axi_clk), .D(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_equal_13_o ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/pausereq_mux_slt_FSM_FFd2_342 ) ); FDRE #( .INIT ( 1'b0 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr_0 ( .C(tx_axi_clk), .CE(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_LessThan_6_o ), .D(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result [0]), .R(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/TX_STATS_BYTEVLD_inv ), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [0]) ); FDRE #( .INIT ( 1'b0 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr_1 ( .C(tx_axi_clk), .CE(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_LessThan_6_o ), .D(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result [1]), .R(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/TX_STATS_BYTEVLD_inv ), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [1]) ); FDRE #( .INIT ( 1'b0 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr_2 ( .C(tx_axi_clk), .CE(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_LessThan_6_o ), .D(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result [2]), .R(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/TX_STATS_BYTEVLD_inv ), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [2]) ); FDRE #( .INIT ( 1'b0 )) \BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr_3 ( .C(tx_axi_clk), .CE(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr[3]_PWR_16_o_LessThan_6_o ), .D(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/Result [3]), .R(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/TX_STATS_BYTEVLD_inv ), .Q(\BU2/U0/PAUSESHIM_8_GEN.pausereq_shim_inst/tx_stats_bytevld_ctr [3]) ); FDR \BU2/U0/tx_axi_shim/tx_mac_tready_reg ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/next_tx_state[3]_ignore_packet_OR_45_o ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_axis_mac_tready) ); FDRE \BU2/U0/tx_axi_shim/tx_data_hold_0 ( .C(tx_axi_clk), .CE(NlwRenamedSig_OI_tx_axis_mac_tready), .D(tx_axis_mac_tdata_5[0]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data_hold [0]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_hold_1 ( .C(tx_axi_clk), .CE(NlwRenamedSig_OI_tx_axis_mac_tready), .D(tx_axis_mac_tdata_5[1]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data_hold [1]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_hold_2 ( .C(tx_axi_clk), .CE(NlwRenamedSig_OI_tx_axis_mac_tready), .D(tx_axis_mac_tdata_5[2]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data_hold [2]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_hold_3 ( .C(tx_axi_clk), .CE(NlwRenamedSig_OI_tx_axis_mac_tready), .D(tx_axis_mac_tdata_5[3]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data_hold [3]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_hold_4 ( .C(tx_axi_clk), .CE(NlwRenamedSig_OI_tx_axis_mac_tready), .D(tx_axis_mac_tdata_5[4]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data_hold [4]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_hold_5 ( .C(tx_axi_clk), .CE(NlwRenamedSig_OI_tx_axis_mac_tready), .D(tx_axis_mac_tdata_5[5]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data_hold [5]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_hold_6 ( .C(tx_axi_clk), .CE(NlwRenamedSig_OI_tx_axis_mac_tready), .D(tx_axis_mac_tdata_5[6]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data_hold [6]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_hold_7 ( .C(tx_axi_clk), .CE(NlwRenamedSig_OI_tx_axis_mac_tready), .D(tx_axis_mac_tdata_5[7]), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data_hold [7]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_0 ( .C(tx_axi_clk), .CE(\BU2/U0/tx_axi_shim/_n0269_inv ), .D(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<0> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data [0]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_1 ( .C(tx_axi_clk), .CE(\BU2/U0/tx_axi_shim/_n0269_inv ), .D(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<1> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data [1]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_2 ( .C(tx_axi_clk), .CE(\BU2/U0/tx_axi_shim/_n0269_inv ), .D(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<2> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data [2]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_3 ( .C(tx_axi_clk), .CE(\BU2/U0/tx_axi_shim/_n0269_inv ), .D(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<3> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data [3]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_4 ( .C(tx_axi_clk), .CE(\BU2/U0/tx_axi_shim/_n0269_inv ), .D(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<4> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data [4]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_5 ( .C(tx_axi_clk), .CE(\BU2/U0/tx_axi_shim/_n0269_inv ), .D(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<5> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data [5]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_6 ( .C(tx_axi_clk), .CE(\BU2/U0/tx_axi_shim/_n0269_inv ), .D(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<6> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data [6]) ); FDRE \BU2/U0/tx_axi_shim/tx_data_7 ( .C(tx_axi_clk), .CE(\BU2/U0/tx_axi_shim/_n0269_inv ), .D(\BU2/U0/tx_axi_shim/tx_data[7]_tx_mac_tdata[7]_mux_64_OUT<7> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_data [7]) ); FDR \BU2/U0/tx_axi_shim/tx_state_FSM_FFd8 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_70_o ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd8_312 ) ); FDS \BU2/U0/tx_axi_shim/tx_state_FSM_FFd10 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/next_tx_state[3]_tx_enable_reg_AND_33_o ), .S(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd10_310 ) ); FDR \BU2/U0/tx_axi_shim/tx_state_FSM_FFd9 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_28_o ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd9_308 ) ); FDR \BU2/U0/tx_axi_shim/tx_state_FSM_FFd7 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd7-In_305 ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd7_306 ) ); FDR \BU2/U0/tx_axi_shim/tx_state_FSM_FFd6 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd6-In ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd6_304 ) ); FDR \BU2/U0/tx_axi_shim/tx_state_FSM_FFd3 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd3-In_301 ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd3_302 ) ); FDR \BU2/U0/tx_axi_shim/tx_state_FSM_FFd5 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_71_o ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd5_300 ) ); FDR \BU2/U0/tx_axi_shim/tx_state_FSM_FFd4 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/next_tx_state[3]_PWR_18_o_equal_74_o ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd4_298 ) ); FDR \BU2/U0/tx_axi_shim/tx_state_FSM_FFd2 ( .C(tx_axi_clk), .D(\BU2/U0/tx_axi_shim/next_tx_state[3]_GND_18_o_equal_72_o ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(\BU2/U0/tx_axi_shim/tx_state_FSM_FFd2_296 ) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_0 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<0> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_statistics_vector_4[0]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_1 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<1> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_statistics_vector_4[1]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_2 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<2> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_statistics_vector_4[2]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_3 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<3> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_statistics_vector_4[3]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_4 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<4> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_statistics_vector_4[4]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_5 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<5> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(rx_statistics_vector_4[5]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_6 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<6> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[6]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_7 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<7> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[7]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_8 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<8> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[8]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_9 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<9> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[9]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_10 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<10> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[10]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_11 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<11> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[11]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_12 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<12> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[12]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_13 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<13> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[13]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_14 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<14> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[14]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_15 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<15> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[15]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_16 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<16> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[16]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_17 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<17> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[17]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_18 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<18> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[18]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_19 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<19> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[19]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_20 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<20> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[20]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_21 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<21> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[21]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_22 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<22> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[22]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_23 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<23> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[23]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_24 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<24> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[24]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_25 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<25> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[25]) ); FDR \BU2/U0/INT_RX_STATISTICS_VECTOR_26 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<26> ), .R(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[26]) ); FDS \BU2/U0/INT_RX_STATISTICS_VECTOR_27 ( .C(rx_axi_clk), .D(\BU2/U0/INT_RX_STATISTICS_VECTOR[27]_RX_STATS_SHIFT[6]_mux_6_OUT<27> ), .S(NlwRenamedSig_OI_rx_reset_out), .Q(NlwRenamedSig_OI_rx_statistics_vector[27]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_0 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<0> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[0]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_1 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<1> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[1]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_2 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<2> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[2]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_3 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<3> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[3]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_4 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<4> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[4]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_5 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<5> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[5]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_6 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<6> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[6]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_7 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<7> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[7]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_8 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<8> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[8]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_9 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<9> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[9]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_10 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<10> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[10]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_11 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<11> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[11]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_12 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<12> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[12]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_13 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<13> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[13]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_14 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<14> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[14]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_15 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<15> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[15]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_16 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<16> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[16]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_17 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<17> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[17]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_18 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<18> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[18]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_19 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<19> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[19]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_20 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<20> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[20]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_21 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<21> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[21]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_22 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<22> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[22]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_23 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<23> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[23]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_24 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<24> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[24]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_25 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<25> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[25]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_26 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<26> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[26]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_27 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<27> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[27]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_28 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<28> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[28]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_29 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<29> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[29]) ); FDR \BU2/U0/INT_TX_STATISTICS_VECTOR_30 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<30> ), .R(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[30]) ); FDS \BU2/U0/INT_TX_STATISTICS_VECTOR_31 ( .C(tx_axi_clk), .D(\BU2/U0/INT_TX_STATISTICS_VECTOR[31]_TX_STATS_SHIFT_mux_10_OUT<31> ), .S(NlwRenamedSig_OI_tx_reset_out), .Q(NlwRenamedSig_OI_tx_statistics_vector[31]) ); FDP #( .INIT ( 1'b1 )) \BU2/U0/SYNC_TX_RESET_I/R2 ( .C(tx_axi_clk), .D(\BU2/U0/SYNC_TX_RESET_I/R1_233 ), .PRE(\BU2/U0/INT_TX_RST_ASYNCH ), .Q(\BU2/U0/SYNC_TX_RESET_I/R2_234 ) ); FDP #( .INIT ( 1'b1 )) \BU2/U0/SYNC_TX_RESET_I/R1 ( .C(tx_axi_clk), .D(\BU2/N0 ), .PRE(\BU2/U0/INT_TX_RST_ASYNCH ), .Q(\BU2/U0/SYNC_TX_RESET_I/R1_233 ) ); FDP #( .INIT ( 1'b1 )) \BU2/U0/SYNC_RX_RESET_I/R2 ( .C(rx_axi_clk), .D(\BU2/U0/SYNC_RX_RESET_I/R1_230 ), .PRE(\BU2/U0/INT_RX_RST_ASYNCH ), .Q(\BU2/U0/SYNC_RX_RESET_I/R2_231 ) ); FDP #( .INIT ( 1'b1 )) \BU2/U0/SYNC_RX_RESET_I/R1 ( .C(rx_axi_clk), .D(\BU2/N0 ), .PRE(\BU2/U0/INT_RX_RST_ASYNCH ), .Q(\BU2/U0/SYNC_RX_RESET_I/R1_230 ) ); TEMAC_SINGLE #( .EMAC_1000BASEX_ENABLE ( "FALSE" ), .EMAC_ADDRFILTER_ENABLE ( "FALSE" ), .EMAC_BYTEPHY ( "FALSE" ), .EMAC_CTRLLENCHECK_DISABLE ( "FALSE" ), .EMAC_DCRBASEADDR ( 8'h00 ), .EMAC_GTLOOPBACK ( "FALSE" ), .EMAC_HOST_ENABLE ( "FALSE" ), .EMAC_LINKTIMERVAL ( 9'h030 ), .EMAC_LTCHECK_DISABLE ( "FALSE" ), .EMAC_MDIO_ENABLE ( "TRUE" ), .EMAC_MDIO_IGNORE_PHYADZERO ( "FALSE" ), .EMAC_PAUSEADDR ( 48'h000000000000 ), .EMAC_PHYINITAUTONEG_ENABLE ( "TRUE" ), .EMAC_PHYISOLATE ( "FALSE" ), .EMAC_PHYLOOPBACKMSB ( "FALSE" ), .EMAC_PHYPOWERDOWN ( "FALSE" ), .EMAC_PHYRESET ( "FALSE" ), .EMAC_RGMII_ENABLE ( "FALSE" ), .EMAC_RX16BITCLIENT_ENABLE ( "FALSE" ), .EMAC_RXFLOWCTRL_ENABLE ( "FALSE" ), .EMAC_RXHALFDUPLEX ( "FALSE" ), .EMAC_RXINBANDFCS_ENABLE ( "FALSE" ), .EMAC_RXJUMBOFRAME_ENABLE ( "FALSE" ), .EMAC_RXRESET ( "FALSE" ), .EMAC_RXVLAN_ENABLE ( "FALSE" ), .EMAC_RX_ENABLE ( "TRUE" ), .EMAC_SGMII_ENABLE ( "TRUE" ), .EMAC_SPEED_LSB ( "FALSE" ), .EMAC_SPEED_MSB ( "TRUE" ), .EMAC_TX16BITCLIENT_ENABLE ( "FALSE" ), .EMAC_TXFLOWCTRL_ENABLE ( "FALSE" ), .EMAC_TXHALFDUPLEX ( "FALSE" ), .EMAC_TXIFGADJUST_ENABLE ( "FALSE" ), .EMAC_TXINBANDFCS_ENABLE ( "FALSE" ), .EMAC_TXJUMBOFRAME_ENABLE ( "FALSE" ), .EMAC_TXRESET ( "FALSE" ), .EMAC_TXVLAN_ENABLE ( "FALSE" ), .EMAC_TX_ENABLE ( "TRUE" ), .EMAC_UNICASTADDR ( 48'h000000000000 ), .EMAC_UNIDIRECTION_ENABLE ( "FALSE" ), .EMAC_USECLKEN ( "FALSE" ), .SIM_VERSION ( "1.0" )) \BU2/U0/v6_emac ( .EMACCLIENTTXCLIENTCLKOUT(tx_axi_clk_out), .EMACPHYTXCHARDISPMODE(tx_char_disp_mode), .HOSTMIIMRDY(\NLW_BU2/U0/v6_emac_HOSTMIIMRDY_UNCONNECTED ), .EMACPHYSYNCACQSTATUS(sync_acq_status), .EMACCLIENTTXSTATSBYTEVLD(\BU2/U0/TX_STATS_BYTEVLD ), .DCRHOSTDONEIR(\NLW_BU2/U0/v6_emac_DCRHOSTDONEIR_UNCONNECTED ), .PHYEMACGTXCLK(gtx_clk), .EMACPHYMGTRXRESET(mgt_rx_reset), .PHYEMACRXCLK(\BU2/N0 ), .DCREMACENABLE(\BU2/N0 ), .EMACSPEEDIS10100(speed_is_10_100), .PHYEMACTXGMIIMIICLKIN(\BU2/N0 ), .EMACCLIENTTXACK(\BU2/U0/TX_ACK ), .EMACPHYTXCHARISK(tx_char_is_k), .PHYEMACRXRUNDISP(rx_run_disp), .PHYEMACMIITXCLK(\BU2/N0 ), .CLIENTEMACTXFIRSTBYTE(\BU2/N0 ), .EMACPHYTXGMIIMIICLKOUT(\NLW_BU2/U0/v6_emac_EMACPHYTXGMIIMIICLKOUT_UNCONNECTED ), .HOSTMIIMSEL(\BU2/N0 ), .EMACCLIENTANINTERRUPT(an_interrupt), .EMACPHYENCOMMAALIGN(en_comma_align), .EMACPHYMDTRI(mdio_tri), .EMACCLIENTRXDVLD(\BU2/U0/RX_DATA_VALID ), .EMACPHYTXEN(\BU2/gmii_tx_en ), .PHYEMACRXNOTINTABLE(rx_not_in_table), .EMACCLIENTRXGOODFRAME(\BU2/U0/RX_GOOD_FRAME ), .DCREMACCLK(\BU2/N0 ), .DCREMACWRITE(\BU2/N0 ), .CLIENTEMACDCMLOCKED(dcm_locked), .PHYEMACRXDV(gmii_rx_dv), .PHYEMACRXCHARISK(rx_char_is_k), .PHYEMACTXBUFERR(tx_buf_err), .EMACPHYMCLKOUT(\BU2/mdc_out ), .CLIENTEMACPAUSEREQ(\BU2/U0/PAUSE_REQ_INT ), .CLIENTEMACTXUNDERRUN(\BU2/U0/tx_axi_shim/tx_underrun_183 ), .EMACCLIENTRXFRAMEDROP(\NLW_BU2/U0/v6_emac_EMACCLIENTRXFRAMEDROP_UNCONNECTED ), .EMACCLIENTRXDVLDMSW(\NLW_BU2/U0/v6_emac_EMACCLIENTRXDVLDMSW_UNCONNECTED ), .EMACCLIENTRXCLIENTCLKOUT(\NLW_BU2/U0/v6_emac_EMACCLIENTRXCLIENTCLKOUT_UNCONNECTED ), .CLIENTEMACTXCLIENTCLKIN(tx_axi_clk), .PHYEMACCRS(N0), .EMACCLIENTTXRETRANSMIT(NlwRenamedSig_OI_tx_retransmit), .PHYEMACMCLKIN(mdc_in), .CLIENTEMACTXDVLDMSW(\BU2/N0 ), .EMACCLIENTRXSTATSBYTEVLD(\NLW_BU2/U0/v6_emac_EMACCLIENTRXSTATSBYTEVLD_UNCONNECTED ), .EMACPHYTXCHARDISPVAL(tx_char_disp_val), .PHYEMACRXDISPERR(rx_disp_err), .PHYEMACRXCHARISCOMMA(rx_char_is_comma), .EMACPHYMDOUT(mdio_out), .EMACPHYMGTTXRESET(mgt_tx_reset), .PHYEMACCOL(N0), .CLIENTEMACTXDVLD(\BU2/U0/tx_axi_shim/tx_data_valid_184 ), .EMACCLIENTTXSTATSVLD(\BU2/U0/TX_STATS_SHIFT_VLD ), .PHYEMACMDIN(mdio_in), .EMACCLIENTTXCOLLISION(tx_collision), .PHYEMACSIGNALDET(signal_det), .EMACCLIENTRXSTATSVLD(\BU2/U0/RX_STATS_SHIFT_VLD ), .HOSTREQ(\BU2/N0 ), .EMACDCRACK(\NLW_BU2/U0/v6_emac_EMACDCRACK_UNCONNECTED ), .HOSTCLK(N0), .PHYEMACRXER(N0), .EMACPHYTXCLK(\NLW_BU2/U0/v6_emac_EMACPHYTXCLK_UNCONNECTED ), .EMACPHYTXER(\BU2/gmii_tx_er ), .EMACPHYPOWERDOWN(powerdown), .EMACPHYLOOPBACKMSB(loopback_msb), .CLIENTEMACRXCLIENTCLKIN(tx_axi_clk), .EMACCLIENTTXSTATS(\BU2/U0/TX_STATS_SHIFT ), .RESET(\BU2/U0/INT_GLBL_RST ), .DCREMACREAD(\BU2/N0 ), .EMACCLIENTRXBADFRAME(\BU2/U0/RX_BAD_FRAME ), .CLIENTEMACTXD({\BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/U0/tx_axi_shim/tx_data [7], \BU2/U0/tx_axi_shim/tx_data [6], \BU2/U0/tx_axi_shim/tx_data [5], \BU2/U0/tx_axi_shim/tx_data [4], \BU2/U0/tx_axi_shim/tx_data [3], \BU2/U0/tx_axi_shim/tx_data [2], \BU2/U0/tx_axi_shim/tx_data [1], \BU2/U0/tx_axi_shim/tx_data [0]}), .HOSTWRDATA({\BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 }), .EMACCLIENTRXD({\NLW_BU2/U0/v6_emac_EMACCLIENTRXD<15>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<14>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<13>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<12>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<11>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<10>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<9>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACCLIENTRXD<8>_UNCONNECTED , \BU2/U0/RX_DATA [7], \BU2/U0/RX_DATA [6], \BU2/U0/RX_DATA [5], \BU2/U0/RX_DATA [4], \BU2/U0/RX_DATA [3], \BU2/U0/RX_DATA [2], \BU2/U0/RX_DATA [1], \BU2/U0/RX_DATA [0]}), .EMACPHYTXD({gmii_txd_2[7], gmii_txd_2[6], gmii_txd_2[5], gmii_txd_2[4], gmii_txd_2[3], gmii_txd_2[2], gmii_txd_2[1], gmii_txd_2[0]}), .PHYEMACRXD({gmii_rxd_8[7], gmii_rxd_8[6], gmii_rxd_8[5], gmii_rxd_8[4], gmii_rxd_8[3], gmii_rxd_8[2], gmii_rxd_8[1], gmii_rxd_8[0]}), .PHYEMACRXCLKCORCNT({rx_clk_cor_cnt_10[2], rx_clk_cor_cnt_10[1], rx_clk_cor_cnt_10[0]}), .CLIENTEMACPAUSEVAL({\BU2/U0/PAUSE_VAL_INT [15], \BU2/U0/PAUSE_VAL_INT [14], \BU2/U0/PAUSE_VAL_INT [13], \BU2/U0/PAUSE_VAL_INT [12], \BU2/U0/PAUSE_VAL_INT [11], \BU2/U0/PAUSE_VAL_INT [10], \BU2/U0/PAUSE_VAL_INT [9], \BU2/U0/PAUSE_VAL_INT [8], \BU2/U0/PAUSE_VAL_INT [7], \BU2/U0/PAUSE_VAL_INT [6], \BU2/U0/PAUSE_VAL_INT [5], \BU2/U0/PAUSE_VAL_INT [4], \BU2/U0/PAUSE_VAL_INT [3], \BU2/U0/PAUSE_VAL_INT [2], \BU2/U0/PAUSE_VAL_INT [1], \BU2/U0/PAUSE_VAL_INT [0]}), .EMACDCRDBUS({\NLW_BU2/U0/v6_emac_EMACDCRDBUS<0>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<1>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<2>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<3>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<4>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<5>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<6>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<7>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<8>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<9>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<10>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<11>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<12>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<13>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<14>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<15>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<16>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<17>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<18>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<19>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<20>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<21>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<22>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<23>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<24>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<25>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<26>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<27>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<28>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<29>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<30>_UNCONNECTED , \NLW_BU2/U0/v6_emac_EMACDCRDBUS<31>_UNCONNECTED }) , .HOSTADDR({\BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 }), .DCREMACDBUS({\BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 }), .EMACCLIENTRXSTATS({\BU2/U0/RX_STATS_SHIFT [6], \BU2/U0/RX_STATS_SHIFT [5], \BU2/U0/RX_STATS_SHIFT [4], \BU2/U0/RX_STATS_SHIFT [3], \BU2/U0/RX_STATS_SHIFT [2], \BU2/U0/RX_STATS_SHIFT [1], \BU2/U0/RX_STATS_SHIFT [0]}), .DCREMACABUS({\BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 , \BU2/N0 }), .HOSTOPCODE({\BU2/N0 , \BU2/N0 }), .CLIENTEMACTXIFGDELAY({tx_ifg_delay_6[7], tx_ifg_delay_6[6], tx_ifg_delay_6[5], tx_ifg_delay_6[4], tx_ifg_delay_6[3], tx_ifg_delay_6[2], tx_ifg_delay_6[1], tx_ifg_delay_6[0]}), .PHYEMACPHYAD({phy_ad_9[4], phy_ad_9[3], phy_ad_9[2], phy_ad_9[1], phy_ad_9[0]}), .PHYEMACRXBUFSTATUS({rx_buf_status, \BU2/N0 }), .HOSTRDDATA({\NLW_BU2/U0/v6_emac_HOSTRDDATA<31>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<30>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<29>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<28>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<27>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<26>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<25>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<24>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<23>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<22>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<21>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<20>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<19>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<18>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<17>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<16>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<15>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<14>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<13>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<12>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<11>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<10>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<9>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<8>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<7>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<6>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<5>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<4>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<3>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<2>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<1>_UNCONNECTED , \NLW_BU2/U0/v6_emac_HOSTRDDATA<0>_UNCONNECTED }) ); GND \BU2/XST_GND ( .G(\BU2/N0 ) ); // synthesis translate_on endmodule // synthesis translate_off `ifndef GLBL `define GLBL `timescale 1 ps / 1 ps module glbl (); parameter ROC_WIDTH = 100000; parameter TOC_WIDTH = 0; //-------- STARTUP Globals -------------- wire GSR; wire GTS; wire GWE; wire PRLD; tri1 p_up_tmp; tri (weak1, strong0) PLL_LOCKG = p_up_tmp; wire PROGB_GLBL; wire CCLKO_GLBL; reg GSR_int; reg GTS_int; reg PRLD_int; //-------- JTAG Globals -------------- wire JTAG_TDO_GLBL; wire JTAG_TCK_GLBL; wire JTAG_TDI_GLBL; wire JTAG_TMS_GLBL; wire JTAG_TRST_GLBL; reg JTAG_CAPTURE_GLBL; reg JTAG_RESET_GLBL; reg JTAG_SHIFT_GLBL; reg JTAG_UPDATE_GLBL; reg JTAG_RUNTEST_GLBL; reg JTAG_SEL1_GLBL = 0; reg JTAG_SEL2_GLBL = 0 ; reg JTAG_SEL3_GLBL = 0; reg JTAG_SEL4_GLBL = 0; reg JTAG_USER_TDO1_GLBL = 1'bz; reg JTAG_USER_TDO2_GLBL = 1'bz; reg JTAG_USER_TDO3_GLBL = 1'bz; reg JTAG_USER_TDO4_GLBL = 1'bz; assign (weak1, weak0) GSR = GSR_int; assign (weak1, weak0) GTS = GTS_int; assign (weak1, weak0) PRLD = PRLD_int; initial begin GSR_int = 1'b1; PRLD_int = 1'b1; #(ROC_WIDTH) GSR_int = 1'b0; PRLD_int = 1'b0; end initial begin GTS_int = 1'b1; #(TOC_WIDTH) GTS_int = 1'b0; end endmodule `endif // synthesis translate_on