2014.4.1:
 * Version 5.0 (Rev. 6)
 * No changes

2014.4:
 * Version 5.0 (Rev. 6)
 * No changes

2014.3:
 * Version 5.0 (Rev. 6)
 * Modified to use new sub-cores in place of proc_common,no functional changes
 * Updated synchronizers for clock domain crossing to reduce Mean Time Between Failures (MTBF) from metastability
 * Updated core to use utils.tcl, needed for board flow from common location

2014.2:
 * Version 5.0 (Rev. 5)
 * Enhanced support for IP Integrator
 * Board flow related updates, no functional changes

2014.1:
 * Version 5.0 (Rev. 4)
 * Internal device family name change, no functional changes

2013.4:
 * Version 5.0 (Rev. 3)
 * Added exdes.xdc file
 * Changed the associated resets for slowest_sync_clk
 * Kintex UltraScale Pre-Production support

2013.3:
 * Version 5.0 (Rev. 2)
 * Changed board flow specific parameter name as per new requirements
 * Added example design and demonstration testbench
 * Reduced warnings in synthesis and simulation
 * Enhanced support for IP Integrator
 * Added support for Cadence IES and Synopsys VCS simulators
 * Updated synchronizers for clock domain crossing to reduce Mean Time Between Failures (MTBF) from metastability
 * Support for 7-series devices at Production status

2013.2:
 * Version 5.0 (Rev. 1)
 * Added BETA support for future devices.
 * No other RTL updates

2013.1:
 * Version 5.0
 * Updated version for 2013.1
 * Updated bd.tcl for board flow
 * No other RTL updates

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