2014.4.1:
 * Version 3.2 (Rev. 1)
 * No changes

2014.4:
 * Version 3.2 (Rev. 1)
 * Improvements of reset handling, no functional changes

2014.3:
 * Version 3.2
 * Added support for external trace
 * Updated subcore references, no functional changes

2014.2:
 * Version 3.1 (Rev. 1)
 * Removed revision control tags from source code comments, no functional changes

2014.1:
 * Version 3.1
 * Added support for debug register access from AXI
 * Added support for AXI memory access from debug
 * Added cross trigger support
 * Internal device family name change, no functional changes

2013.4:
 * Version 3.0 (Rev. 3)
 * Added XDC constraints for DRCK and UPDATE internal clocks

2013.3:
 * Version 3.0 (Rev. 2)
 * Reduced warnings in simulation
 * Support for Automotive Artix-7, Automotive Zynq, Defense Grade Artix-7, and Defense Grade Zynq devices at Production status

2013.2:
 * Version 3.0 (Rev. 1)
 * Repackaged to improve internal automation, no functional changes

2013.1:
 * Version 3.0
 * Vivado-only core, with no functional changes from version 2.10.a
 * There have been no functional or interface changes to this IP.  The version number has changed to support unique versioning in Vivado starting with 2013.1.

2012.4:
 * Version 2.10.a
 * No changes

2012.3:
 * Version 2.10.a
 * No changes

2012.2:
 * Version 2.10.a
 * Native Vivado release
 * Support for up to 32 processors
 * External BSCAN input port
 * Added C_USE_BSCAN parameter to select internal, icon or external BSCAN

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