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-- IP VLNV: xilinx.com:ip:lmb_bram_if_cntlr:4.0
-- IP Revision: 5

-- The following code must appear in the VHDL architecture header.

------------- Begin Cut here for COMPONENT Declaration ------ COMP_TAG
COMPONENT mbsys_dlmb_bram_if_cntlr_0
  PORT (
    LMB_Clk : IN STD_LOGIC;
    LMB_Rst : IN STD_LOGIC;
    LMB_ABus : IN STD_LOGIC_VECTOR(0 TO 31);
    LMB_WriteDBus : IN STD_LOGIC_VECTOR(0 TO 31);
    LMB_AddrStrobe : IN STD_LOGIC;
    LMB_ReadStrobe : IN STD_LOGIC;
    LMB_WriteStrobe : IN STD_LOGIC;
    LMB_BE : IN STD_LOGIC_VECTOR(0 TO 3);
    Sl_DBus : OUT STD_LOGIC_VECTOR(0 TO 31);
    Sl_Ready : OUT STD_LOGIC;
    Sl_Wait : OUT STD_LOGIC;
    Sl_UE : OUT STD_LOGIC;
    Sl_CE : OUT STD_LOGIC;
    BRAM_Rst_A : OUT STD_LOGIC;
    BRAM_Clk_A : OUT STD_LOGIC;
    BRAM_Addr_A : OUT STD_LOGIC_VECTOR(0 TO 31);
    BRAM_EN_A : OUT STD_LOGIC;
    BRAM_WEN_A : OUT STD_LOGIC_VECTOR(0 TO 3);
    BRAM_Dout_A : OUT STD_LOGIC_VECTOR(0 TO 31);
    BRAM_Din_A : IN STD_LOGIC_VECTOR(0 TO 31)
  );
END COMPONENT;
-- COMP_TAG_END ------ End COMPONENT Declaration ------------

-- The following code must appear in the VHDL architecture
-- body. Substitute your own instance name and net names.

------------- Begin Cut here for INSTANTIATION Template ----- INST_TAG
your_instance_name : mbsys_dlmb_bram_if_cntlr_0
  PORT MAP (
    LMB_Clk => LMB_Clk,
    LMB_Rst => LMB_Rst,
    LMB_ABus => LMB_ABus,
    LMB_WriteDBus => LMB_WriteDBus,
    LMB_AddrStrobe => LMB_AddrStrobe,
    LMB_ReadStrobe => LMB_ReadStrobe,
    LMB_WriteStrobe => LMB_WriteStrobe,
    LMB_BE => LMB_BE,
    Sl_DBus => Sl_DBus,
    Sl_Ready => Sl_Ready,
    Sl_Wait => Sl_Wait,
    Sl_UE => Sl_UE,
    Sl_CE => Sl_CE,
    BRAM_Rst_A => BRAM_Rst_A,
    BRAM_Clk_A => BRAM_Clk_A,
    BRAM_Addr_A => BRAM_Addr_A,
    BRAM_EN_A => BRAM_EN_A,
    BRAM_WEN_A => BRAM_WEN_A,
    BRAM_Dout_A => BRAM_Dout_A,
    BRAM_Din_A => BRAM_Din_A
  );
-- INST_TAG_END ------ End INSTANTIATION Template ---------

-- You must compile the wrapper file mbsys_dlmb_bram_if_cntlr_0.vhd when simulating
-- the core, mbsys_dlmb_bram_if_cntlr_0. When compiling the wrapper file, be sure to
-- reference the VHDL simulation library.