2014.4.1: * Version 4.0 (Rev. 5) * No changes 2014.4: * Version 4.0 (Rev. 5) * No changes 2014.3: * Version 4.0 (Rev. 5) * Repackaged parameters for internal automation, no functional changes * Added default drivers on LMB input write signals to avoid warnings, no functional changes 2014.2: * Version 4.0 (Rev. 4) * Removed revision control tags from source code comments, no functional changes 2014.1: * Version 4.0 (Rev. 3) * Changed internal address automation, no functional changes * Internal device family name change, no functional changes * Added warning for invalid C_MASK parameter user override 2013.4: * Version 4.0 (Rev. 2) * No changes 2013.3: * Version 4.0 (Rev. 2) * Added MASTER_TYPE property on the BRAM interface * Changed BRAM interface DIN and DOUT to match bus interface directions * Support for Automotive Artix-7, Automotive Zynq, Defense Grade Artix-7, and Defense Grade Zynq devices at Production status * Ensure that other masters are excluded from C_MASK calculation 2013.2: * Version 4.0 (Rev. 1) * Repackaged to improve internal automation, no functional changes 2013.1: * Version 4.0 * Vivado-only core, with no functional changes from version 3.10.c * There have been no functional or interface changes to this IP. The version number has changed to support unique versioning in Vivado starting with 2013.1. 2012.4: * Version 3.10.c * Fixed issue with missing signal in sensitivity list, only affecting simulation, which can only occur when C_ECC is set, C_HAS_ECC_ONOFF_REGISTER is set, and C_INTERCONNECT is not 0 2012.3: * Version 3.10.b * Fixed issue with error detection and correction not performed when no bus interface used (C_INTERCONNECT = 0) 2012.2: * Version 3.10.a * Native Vivado release * Support for multiple LMB buses * Fixed error signalling when a bit-error is detected during a byte/half-word write. Ensure that correctable errors update registers and assert the CE signal on the LMB. Ensure that uncorrectable errors update registers and assert the UE signal on the LMB. (c) Copyright 2002 - 2015 Xilinx, Inc. All rights reserved. This file contains confidential and proprietary information of Xilinx, Inc. and is protected under U.S. and international copyright and other intellectual property laws. DISCLAIMER This disclaimer is not a license and does not grant any rights to the materials distributed herewith. Except as otherwise provided in a valid license issued to you by Xilinx, and to the maximum extent permitted by applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising under or in connection with these materials, including for any direct, or any indirect, special, incidental, or consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same. CRITICAL APPLICATIONS Xilinx products are not designed or intended to be fail- safe, or for use in any application requiring fail-safe performance, such as life-support or safety devices or systems, Class III medical devices, nuclear facilities, applications related to the deployment of airbags, or any other applications that could lead to death, personal injury, or severe property or environmental damage (individually and collectively, "Critical Applications"). Customer assumes the sole risk and liability of any use of Xilinx products in Critical Applications, subject only to applicable laws and regulations governing limitations on product liability. THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE AT ALL TIMES.