2014.4.1: * Version 6.2 (Rev. 1) * No changes 2014.4: * Version 6.2 (Rev. 1) * Adding support for XC7Z035 and XC7A15T devices. * Adding support for XA/XQ device variants. 2014.3: * Version 6.2 * Support core in native Vivado catalog. * Added example design. * Added demonstration testbench. * Added non Processor Mode. * Added Priority Flow Control (PFC) support in non-processor mode. * Added 1588 support for ultrascale devices. * Support optional Transceiver control and status ports in non-processor mode. 2014.2: * Version 6.1 (Rev. 1) * Support latest GT version. 2014.1: * Version 6.1 * Support 1588 Correction Field format. 2013.4: * Version 6.0 (Rev. 1) * Kintex UltraScale Pre-Production support. * Support Include IO option for GMII. 2013.3: * Version 6.0 * Added option to include or exclude shareable logic resources in the core. * Added support for Board based IO constraints generation. * Enhanced support for IP Integrator. * Added support for upgrade from previous versions. * Updated the address segment name. Please use assign bd address tool command to assign address. * Interface/Port names have changed. Streaming interfaces are now renamed as m_axis_rxd from AXI_STR_RXD and similarly for others. MDIO ports are packaged as an interface. Ports txp txn rxp and rxn are packaged as SGMII or SFP interfaces based on the board connectivity. To reconnect these ports you may use connection automation. 2013.2: * Version 5.0 * New features like SGMII over LVDS, and IEEE 1588 support are added to this core. * Port names have changed. 2013.1: * Version 4.0 * Native Vivado Release * There have been no functional or interface changes to this IP. The version number has changed to support unique versioning in Vivado starting with 2013.1. (c) Copyright 2012 - 2015 Xilinx, Inc. All rights reserved. This file contains confidential and proprietary information of Xilinx, Inc. and is protected under U.S. and international copyright and other intellectual property laws. DISCLAIMER This disclaimer is not a license and does not grant any rights to the materials distributed herewith. Except as otherwise provided in a valid license issued to you by Xilinx, and to the maximum extent permitted by applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF MERCHANTABILITY, NON- INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising under or in connection with these materials, including for any direct, or any indirect, special, incidental, or consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same. CRITICAL APPLICATIONS Xilinx products are not designed or intended to be fail- safe, or for use in any application requiring fail-safe performance, such as life-support or safety devices or systems, Class III medical devices, nuclear facilities, applications related to the deployment of airbags, or any other applications that could lead to death, personal injury, or severe property or environmental damage (individually and collectively, "Critical Applications"). Customer assumes the sole risk and liability of any use of Xilinx products in Critical Applications, subject only to applicable laws and regulations governing limitations on product liability. THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE AT ALL TIMES.