#----------------------------------------------------------- # Vivado v2014.4 (64-bit) # SW Build 1071353 on Tue Nov 18 18:29:27 MST 2014 # IP Build 1070531 on Tue Nov 18 01:10:18 MST 2014 # Start of session at: Tue Mar 24 11:47:23 2015 # Process ID: 5780 # Log file: C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp/vivado.log # Journal file: C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp\vivado.jou #----------------------------------------------------------- start_gui open_project C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.xpr INFO: [Project 1-313] Project file moved from 'C:/Users/adowd/AppData/Roaming/Xilinx/Vivado/.Xil/Vivado-3380-lithe-ad-work/PrjAr/_X_' since last save. Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2014.4/data/ip'. WARNING: [BD 41-1303] One or more IPs have been locked in the design 'mbsys.bd'. Please run report_ip_status for more details and recommendations on how to fix this issue. open_project: Time (s): cpu = 00:00:17 ; elapsed = 00:00:10 . Memory (MB): peak = 781.742 ; gain = 204.035 open_hw INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121 INFO: [Labtools 27-2222] Launching hw_server... INFO: [Labtools 27-2221] Launch Output: ****** Xilinx hw_server v2014.4 **** Build date : Nov 18 2014-18:09:44 ** Copyright 1986-1999, 2001-2014 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application ****** Xilinx hw_server v2014.4 **** Build date : Nov 18 2014-18:09:44 ** Copyright 1986-1999, 2001-2014 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application WARNING: [Labtoolstcl 44-26] No hardware targets exist on the server [TCP:localhost:3121] Check to make sure the cable targets connected to this machine are properly connected and powered up, then use the disconnect_hw_server and connect_hw_server commands to re-register the hardware targets. disconnect_hw_server localhost INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121 close_hw ****** Webtalk v2014.4 (64-bit) **** SW Build 1071353 on Tue Nov 18 18:29:27 MST 2014 **** IP Build 1070531 on Tue Nov 18 01:10:18 MST 2014 ** Copyright 1986-2014 Xilinx, Inc. All Rights Reserved. source C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.hw/webtalk/labtool_webtalk.tcl -notrace INFO: [Common 17-186] 'C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.hw/webtalk/usage_statistics_ext_labtool.xml' has been successfully sent to Xilinx on Tue Mar 24 12:13:00 2015. For additional details about this file, please refer to the WebTalk help file at C:/Xilinx/Vivado/2014.4/doc/webtalk_introduction.html. INFO: [Common 17-206] Exiting Webtalk at Tue Mar 24 12:13:00 2015... close_hw: Time (s): cpu = 00:00:01 ; elapsed = 00:00:06 . Memory (MB): peak = 781.742 ; gain = 0.000 reset_run synth_1 launch_runs impl_1 -to_step write_bitstream [Tue Mar 24 12:35:41 2015] Launched synth_1... Run output will be captured here: C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.runs/synth_1/runme.log [Tue Mar 24 12:35:41 2015] Launched impl_1... Run output will be captured here: C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.runs/impl_1/runme.log launch_sdk -workspace C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.sdk -hwspec C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.sdk/toplevel.hdf INFO: [Vivado 12-393] Launching SDK... INFO: [Vivado 12-417] Running xsdk -workspace C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.sdk -hwspec C:/Users/kjohns/Documents/a7_l1ddc_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.sdk/toplevel.hdf INFO: [Vivado 12-3157] SDK launch initiated. Please check console for any further messages. close_project open_project C:/Users/kjohns/Documents/a7_mmfe_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.xpr INFO: [Project 1-313] Project file moved from 'C:/Users/adowd/AppData/Roaming/Xilinx/Vivado/.Xil/Vivado-3380-lithe-ad-work/PrjAr/_X_' since last save. Scanning sources... Finished scanning sources INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2014.4/data/ip'. WARNING: [BD 41-1303] One or more IPs have been locked in the design 'mbsys.bd'. Please run report_ip_status for more details and recommendations on how to fix this issue. open_project: Time (s): cpu = 00:00:09 ; elapsed = 00:00:08 . Memory (MB): peak = 813.563 ; gain = 14.246 launch_sdk -workspace C:/Users/kjohns/Documents/a7_mmfe_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.sdk -hwspec C:/Users/kjohns/Documents/a7_mmfe_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.sdk/toplevel.hdf INFO: [Vivado 12-393] Launching SDK... INFO: [Vivado 12-417] Running xsdk -workspace C:/Users/kjohns/Documents/a7_mmfe_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.sdk -hwspec C:/Users/kjohns/Documents/a7_mmfe_mb_udp.xpr/a7_mmfe_mb_udp/a7_mmfe_mb_udp.sdk/toplevel.hdf INFO: [Vivado 12-3157] SDK launch initiated. Please check console for any further messages.