Level 1 Muon (L1MU) Trigger Documents

 Technical Summary of the Level 1 Muon Trigger TDR Summary

Overview of Level 1 Muon Trigger 1996 IEEE Proceedings (an older document)

 Block Diagram of Level 1 Muon Trigger System One page

 Muon Trigger Crate Manager (MTCM) Last updated 11/19/02

 Muon Trigger Card (MTCxx) Specification

 CF MTC10 Flavor Board (CF MTC10 MTFB) Specification

 EF MTC05 Flavor Board (EF MTC05 MTFB) Specification

 Muon Trigger Manager Flavor Board (MTM MTFB) Specification

 Muon Centroid Finder (MCEN) Specification

 Muon Centroid Crate Manager (MCCM) Specification

 Muon Trigger Test Card (MTT) Specification

 Muon Trigger Splitter Card (MSPLIT) Specification

 Serial Link Daughter Board (SLDB) Transmitter 7/7/99 Specification

 Serial Link Daughter Board (SLDB) Receiver 1/18/00 Specification

 Serial Link Daughter Board Tester Document

 1553 and UART Specification

 L1MU L2 and L3 Data Specification

 L1MU Simulation and Efficiency

 L1MU Estimated Background Rates

 Testing and Monitoring the L1MU Trigger

 L1MU Trigger Estimated Timing (Excel file)

 L1MU Platform Space

 L1MU Trigger Crate Layout and Input Map

 L1MU Trigger Cable Map (Excel file)

 L1MU Cost Estimate

 L1MU Schedule (MS Project 98 file)

 Public Relations Pictures of L1MU Trigger Cards

 SLIC Tester Card Specification as of 2/14/00

 SLIC Tester Card Cost Estimate

 

 Go to information about the MCEN and MCCM cards

 Go to information about Muon Front End Electronics

 Go to information about the D0 Muon Upgrade for Run 2

 Go to information about the D0 Upgrade for Run 2

 

Last updated November 19, 2002
If you have problems with any of these links please email me at johns@fnal.gov